Exploration of Physics and Integration of Nano-Scale MOSEFET with Suppressed Fluctuations

抑制波动的纳米级MOSFET的物理和集成探索

• 批准号: 13450135
• 负责人: HIRAMOTO Toshiro
• 金额: $ 9.47万
• 依托单位: The University of Tokyo
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for Scientific Research (B)
• 财政年份: 2001
• 资助国家: 日本
• 起止时间: 2001 至 2003
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/en/grant/KAKENHI-PROJECT-13450135/
• 关键词: Semiconductor; Silicon MOSFET; Quantum Effect; Coulomb Blockade; Single-Electron Transistor; Quantum Dot; Resonant Tunneling; Nanotechnology; 不揮発性メモリ; しきい値電圧; 保持時間; シリコン; MOSFET; 移動度; 量子輸送現象; 揺らぎ

The purpose of this research is to investigate the physics in nano-scale MOSEFET with suppressed size fluctuations and to apply new phenomena to integrated circuit devices. We have developed the fabrication process of nano-devices with dimensions less than 10nm by means of electron beam lithography and etching. Quantum effects and single-electron charging effect appear at room temperature in the fabricated devices. In the MOSFET with extremely narrow channel less than 10nm, the increase in threshold voltage is observed due to the rise of ground energy of electrons in narrow channel. We have proposed a new method to control threshold voltage in nano-scale MOSFET using this effect. It is also shown by simulation that electron and hole mobility increases in ultra-narrow channel MOSFET. On the other hand, Coulomb blockade oscillations due to single-electron charging effect is observed at room temperature in point-contact MOSFETs. A silicon dot is self-formed between source and drain and the device acts as a single-electron or single-hole transistor. We fabricated a point-contact MOSFET with a dot of 2nm diameter. The peak-to-valley current ratio of the Coulomb blockade oscillations is over 40 at room temperature. Negative differential conductance due to resonant tunneling is also observed. The two-input logic operation using a single device is demonstrated for the first time using a single-hole transistor.

本研究的目的是探讨抑制尺寸波动的纳米级MOSEFET的物理特性，并将新现象应用于集成电路器件。利用电子束光刻和蚀刻技术，开发了尺寸小于10nm的纳米器件的制备工艺。所制器件在室温下出现量子效应和单电子充电效应。在小于10nm的极窄沟道MOSFET中，由于窄沟道中电子的地能上升，观察到阈值电压的增加。我们提出了一种利用这种效应控制纳米级MOSFET阈值电压的新方法。仿真结果还表明，在超窄沟道MOSFET中，电子和空穴迁移率都有所提高。另一方面，在室温下，点接触mosfet中观察到由于单电子充电效应引起的库仑阻塞振荡。硅点在源极和漏极之间自形成，该器件充当单电子或单孔晶体管。我们制作了一个直径为2nm的点接触MOSFET。室温下，库仑阻塞振荡的峰谷电流比大于40。由于共振隧道效应，也观察到负差分电导。使用单孔晶体管首次演示了使用单个器件的双输入逻辑操作。

项目成果

M.Saitoh, T.Hiramoto: "Observation of current staircase due to large quantum level spacing in a silicon single-electron transistor with low parasitic series resistance"Journal of Applied Physics. Vol.91, No.10. 6725-6728 (2002)

M.Saitoh、T.Hiramoto：“由于低寄生串联电阻的硅单电子晶体管中的大量子能级间距而导致的电流阶梯的观察”应用物理学杂志。

M.Saitoh, T.Hiramoto: "Effects of Discrete Quantum Levels on Electron Transport in Silicon Single-Electron Transistors with an Ultra-Small Quantum Dog"IEICE Transactions of Electronics. Vol.E84-C, No.8. 1074-1076 (2001)

M.Saitoh、T.Hiramoto：“离散量子能级对具有超小型量子狗的硅单电子晶体管中电子传输的影响”IEICE Transactions of Electronics。

T.Saito, T.Saraya, T.Inukai, H.Majima, T.Nagumo, T.Hiramoto: "Suppression of Short Channel Effect in Triangular Parallel Wire Channel MOSFETs."IEICE Transactions on Electronics. Vol.E85-C, No.5. 1073-1078 (2002)

T.Saito、T.Saraya、T.Inukai、H.Majima、T.Nagumo、T.Hiramoto：“三角形并行线沟道 MOSFET 中短沟道效应的抑制。”IEICE 电子交易。

Masumi Saitoh, Tasuku Murakami, Toshiro Hiramoto: "Large Coulomb Blockade Oscillations at Room Temperature in Ultra-Narrow Wire Channel MOSFETs Formed by Slight Oxidation Process"IEEE Transactions on Nanotechnology. Vol.2, No.4. 241-245 (2003)

Masumi Saitoh、Tasuku Murakami、Toshiro Hiramoto：“轻微氧化过程形成的超窄线通道 MOSFET 中室温下的大库仑封锁振荡”IEEE 纳米技术汇刊。

M.Saitoh, E.Nagata, T.Hiramoto: "Large memory window and long charge retention time in ultra-narrow channel silicon floating-dot memory"Applied Physics Letters. (採択決定). (2003)

M.Saitoh、E.Nagata、T.Hiramoto：“超窄沟道硅浮点存储器中的大存储窗口和长电荷保留时间”应用物理快报（2003 年）。