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A research on silicon nano-devices for single-electron, quantum, CMOS integrated circuits operating at room temperature

A research on silicon nano-devices for single-electron, quantum, CMOS integrated circuits operating at room temperature
室温下运行的单电子、量子、CMOS集成电路的硅纳米器件研究
批准号:
16201029
负责人:
HIRAMOTO Toshiro
金额:
$31.7万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (A)
财政年份:
2004
资助国家:
日本
项目状态:
已结题
起止时间:
2004 至 2007

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中文摘要
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英文摘要
This research aims at a new concept of integrate circuit in which new functional devices utilizing single-electron/quantum effect and conventional CMOS devices are merged operating at room temperature. At first, the fabrication process of single-electron transistors was developed. The world largest peak-to-valley current ratios of Coulomb blockade oscillations and negative differential conductance at room temperature were successfully obtained. Furthermore, the precise control of the peak position of the Coulomb blockade oscillations was achieved for the first time in single-hole transistors which have very small quantum dots. The unique characteristics originate from large quantum energy spacing in the quantum dot. Next, the integration of single-electron transistors operating at room temperature was pursued. The process conditions were finely tuned and finally, the single-electron transistors operating at room temperature were successfully integrated for the first time. Moreover, analog pattern matching circuits were fabricated by integrating single-electron transistors and their operations were demonstrated at room temperature.
期刊论文(264)
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会议论文
DOI: --
发表时间: 2007
期刊: Applied Physics Letters Vol. 91, No. 5
影响因子: --
作者: [Kousuke Miyaji, Toshiro Hiramoto]
通讯作者: Toshiro Hiramoto
Experimental Study on Quantum Structure of Silicon Nano Wire and Its Impact on Nano Wire MOSFET and Single-Electron Transistor
硅纳米线量子结构及其对纳米线MOSFET和单电子晶体管影响的实验研究
DOI: --
发表时间: 2006
期刊:
影响因子: --
作者: [Masaharu, Kobayashi, Toshiro Hiramoto]
通讯作者: Toshiro Hiramoto
Mobility Degradation in (110)-Oriented Ultra-thin Body Double-Gate pMOSFETs with SOI Thickness of less than 5nm
SOI 厚度小于 5nm 的 (110) 取向超薄体双栅极 pMOSFET 中的迁移率下降
DOI: --
发表时间: 2007
期刊:
影响因子: --
作者: [Ken Shimizu, Toshiro Hiramoto]
通讯作者: Toshiro Hiramoto
DOI: 10.1109/iedm.2007.4419046
发表时间: 2007-12
期刊: 2007 IEEE International Electron Devices Meeting
影响因子: --
作者: [K. Shimizu;T. Hiramoto]
通讯作者: K. Shimizu;T. Hiramoto
90
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      26630148
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