Study on Post-Binary ULSI Sstems

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The present binary VLSI systems will be confronted with many serious problems in an ultimately fine geometry feature size. Some of them are listed below :(1) Interconnection delay is prominent limit on the performance in the deep submicron integrated circuits.(2) For low-voltage operations, noises caused inside a chip should be reduced.(3) Parallel procesing performance is limited by data communications between processing elements.(4) Large scale design is essential at various levels such as logic design, test, circuit design and physical design.(5) New phenomena such as tunnneling and quantum effects will be caused in microelectronics devices, which is usually assumed to be inconvenient effects for binary digital operations.Multiple-valued digital processing and its integration are expected to be one of the most effective solutions for the above problems. The objective of this research is to demonstrate theories, new developments and techniques in multiple-valued integrated circuits a … More nd their applications. Especially, the delay time due to global communications between functional modules is one of the most important factors to determine the total performance In ULSI Processors for the applications of intelligent integrated systems.Several concrete advantages of multiple-valued digital procssing technology have been established in deep submicron geometry. They are classified to the device and circuit level, the arithmetic and logic algortihm level, and the system application level. In the device and circuit level, we have demonstrated that the new area called device-model based electronics becomes very important to activate the new direction of the device development suitable for multiple-valued operations. In the alogorithm level, we have proposed a new design method for highly parallel operation circuits based on a linear concept. In the system application level, we have designed a new multiple-valued ULSI processor for digital control with spatially parallel structure. Further, we have proposed a universal super chip for intelligent integrated systems with very flexible network structure. Less