Development of VLSI Processor Chip Family for Highly-Safe Intelligent Vehicles Based on Optimal Design Mythologies

基于优化设计神话的高安全智能汽车VLSI处理器芯片系列开发

• 批准号: 12555119
• 负责人: KAMEYAMA Michitaka
• 金额: $ 4.61万
• 依托单位: Tohoku University
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for Scientific Research (B)
• 财政年份: 2000
• 资助国家: 日本
• 起止时间: 2000 至 2002
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/en/grant/KAKENHI-PROJECT-12555119/
• 关键词: Intelligent Integrated Systems for Real-World Applications; High-Level Synthesis; Scheduling; Allocation; Low-Power VLSI Processor; Logic-In-Memory Architecture; Highly-Safe Intelligent Vehicle; 低消費電力VLSI1プロセッサ; ロジックインメモリーアーキテクチャ構造

Intelligent vehicle applications are expected to be one of promising future system LSI applications. If these applications become realistic, any real-worldapplications will be posslit1e. As typical case studies, intelligent vehicle applications are useful to develop a high-level synthesis methology of system LSI. From the point of view, the following technologies are studied1. VLSI chip family for intelligent vehiclesThe highest performance VLSI chip family is developed for highly-safe intelligent vehicles. These are VLSI processors for stereo vision, optical-flow extraction, path planning and trajectory perdition based on probabilistic inference. These VLSI-oriented algorithms are also discussed to reduce the computational complexity. Moreover, a high-performance field-programmable VLSI which is very superior to the conventional FPGAS is developed2. System integration and intelligent algorithmsSensing of environment information and prediction of the dynamic change are very important t … More echnologies to realize real-world applications. A system integration methology is developed considering measurement and prediction errors. The condition of a sampling period is discussed based on a real-world signal processing model.3. Design theory of VLSI processorsOne of the most serious problems in recent VLSI systems is large delay due to interconnection complexity between memories and processing elements. To solve the problem, a parallel processing module composed of a processing element and a local memory is defined as a basic building block to make interconnection delay as small as possible. Still, there exists propagation delay for data transfer between the modules. A high-level synthesis method considering the data transfer time is discussed on the hardware model, when a data-dependency graph corresponding to a processing algorithm is given. We must simultaneously consider both scheduling and allocation for the time optimization problem under a constraint of achip area. A branch and bound method and a genetic algorithm are effectively employed to find an optimum solution. Extension of the above methologies is also considered to solve the following general problems・Minimization of processing under chip area constraint・Minimization of chip area under processing time constraint・Minimization of dissipation energy under processing time and chip area constraint Less

智能汽车应用有望成为未来系统LSI应用的重要领域之一。如果这些应用程序成为现实，任何现实世界的应用程序都将成为可能。作为典型的案例研究，智能汽车的应用有助于开发系统大规模集成电路的高级综合方法。从这个角度来看，研究了以下技术：面向智能汽车的VLSI芯片系列高性能VLSI芯片系列是为高度安全的智能汽车而开发的。这些是用于立体视觉、光流提取、路径规划和基于概率推理的轨迹预测的VLSI处理器。为了降低计算复杂度，本文还讨论了这些面向超大规模集成电路的算法。此外，还开发了一种高性能的现场可编程VLSI，其性能大大优于传统的fpga 2。系统集成和智能算法对环境信息的感知和动态变化的预测是实现实际应用的重要技术。提出了一种考虑测量误差和预测误差的系统集成方法。基于实际信号处理模型，讨论了采样周期的条件。超大规模集成电路（VLSI）处理器的设计理论由于存储器和处理元件之间互连的复杂性而导致的大延迟是当前超大规模集成电路系统中最严重的问题之一。为了解决这个问题，定义了一个由处理单元和本地存储器组成的并行处理模块作为基本构件，使互连延迟尽可能小。但是，模块之间的数据传输存在传输延迟。在硬件模型上讨论了考虑数据传输时间的高级综合方法，给出了相应处理算法的数据依赖图。对于芯片面积约束下的时间优化问题，必须同时考虑调度和分配问题。分支定界法和遗传算法是求解最优解的有效方法。上述方法的扩展也可以考虑解决以下一般问题：·在芯片面积约束下的加工最小化·在加工时间约束下的芯片面积最小化·在加工时间和芯片面积约束下的耗散能量最小化

项目成果

Masanori Hariyama, Toshiki Takeuchi, Michitaka Kameyama: "VLSI Processor for Reliable Stereo Matching Based on Adaptive Window-Size Selection"Proc. International Conference on Robotics and Automation. 1168-1173 (2001)

Masanori Hariyama、Toshiki Takeuchi、Michitaka Kameyama：“基于自适应窗口大小选择的可靠立体声匹配的 VLSI 处理器”Proc。

大澤尚学, 張山昌論, 亀山充隆: "コントロール/データフローグラフの直接アロケーションに基づくフィールドプログラマブルVLSIプロセッサ"電子情報通信学会論文誌. Vol. J85-C, No.5. 384-392 (2002)

Naoki Osawa、Masaru Hariyama、Mitsutaka Kameyama：“基于控制/数据流图直接分配的现场可编程 VLSI 处理器”，电子、信息和通信工程师学会汇刊，第 5 期。384-。 392（2002）

Masanori Hariyama and Michitaka Kameyama: "Optical Plow Extraction Based on Reuse of Intermediate Results and VLSI Implementation"Proc. SINCE2002. pp. 2366-2369 (2002)

Masanori Hariyama 和 Michitaka Kameyama：“基于中间结果重用和 VLSI 实现的光学犁提取”Proc。

大澤尚学, 張山昌論, 亀山充隆: "ビットシリアル演算セルに基づくフィールドプログラマブルVLSIプロセッサの構成"信学技報. ICD2002-64. 1-6 (2002)

Naomanaka Osawa、Masaru Hariyama、Mitsutaka Kameyama：“基于位串行算术单元的现场可编程 VLSI 处理器的配置”IEICE 技术报告 1-6 (2002)。

佐々木明夫, 張山昌論, 亀山充隆: "軌道予測に基づく捕球ロボットの動作実験"電気関係学会東北支部連合大会. 2A23. 37 (2002)

Akio Sasaki，Masanori Hariyama，Mitsutaka Kameyama：“基于轨迹预测的接球机器人的操作实验”电气工程学会东北分会会议2A23。