Multiple-Valued Reconfigurable VLSI Based on Adaptively Autonomous Operation

提出了一种基于多值差分对电路的细粒度多值可重构VLSI结构，以实现极高性能和低功耗操作。利用多值信令来实现紧凑的开关块，其中诸如“0”、“1”、“2”和“3”的多值信号在一条线路中传输。此外，一个自主的功率门控方案介绍了使用两种技术。一种是基于有效数据信号检测的电流源控制。另一种是电流源控制，使得在检测到逻辑运算完成信号之后在时钟周期内关断电流源。此外，引入寄存器传输级分组路由方案以减小动态可重配置处理器的配置存储器大小。寄存器传输驱动的概念使得配置存储器的大小非常小，因为不需要在所有时钟周期提供分组。

A fine-grain multiple-valued reconfigurable VLSI architecture using multiple-valued differential-pair circuits is developed to achieve very high-performance and low- power operations. Multiple-valued signaling is utilized to implement a compact switch block, where multiple-valued signals such as “0", “1", "2" and “3" are transmitted in one line. Also, an autonomous power gating scheme is introduced using two techniques. One is a current-source control based on valid data signal detection. The other is a current-source control such that current sources are turned off within a clock cycle after a logic operation completion signal is detected. Moreover, a register-transfer-level packet routing scheme is introduced to reduce a configuration memory size of a dynamically reconfigurable processor. The register-transfer-driven concept makes the configuration memory size very small, because packets are not required to be provided at all the clock cycles.