Optimal VLSI Design for a Highly-Safe Intelligent Vehicle Based on a System Integration Theory
Optimal VLSI Design for a Highly-Safe Intelligent Vehicle Based on a System Integration Theory
批准号:
17300009
负责人:
KAMEYAMA Michitaka
金额:
$8.58万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B)
财政年份:
2005
资助国家:
日本
项目状态:
已结题
起止时间:
2005 至 2007
中文摘要
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英文摘要
Intelligent algorithms, advanced VLSI architectures and a system integration theory are studied to develop a highly-safe intelligent vehicle.(1) System-Application-Level Design TheoryA real-world intelligent integrated system consists of three basic modules of environment recognition, prediction or estimation, and behavior planning. A system integration theory including derivation of performance specification is studied to bridge the gap between the various design levels as well as their VLSI-oriented intelligent algorithms.(2) Processing Module for Highly-Safe Intelligent VehiclesVLSI-oriented algorithms for road extraction, vehicle extraction and human extraction using 3-dimensional image information are developed. Moreover, motion estimation of a vehicle is done based on Bayesian Network The problem is equivalent to estimation of a driver's intention. The driver's intentions are hierarchically defined, so that the designed Bayesian Network becomes as simple as possible. Then, causal relation between the intentions is discussed to reflect the real-world motion process.(3) Optimal Design Theory of VLSI Processors for Intelligent Integrated SystemsTo achieve power minimization under a time/area constraint, high-level synthesis techniques are investigated based on scheduling and allocation. One typical example is a parallel VLSI for 3-dimensional image processing with optimal memory allocation which solves the data transfer bottleneck between processing elements and memory modules.(4) Reconfigurable VLSI ComputingFine-grained reconfigurable VLSIs for real-world applications superior to the conventional FPGAs are designed and implemented based on new architectures such as direct allocation of a control-data-flow graph, a bit-serial arithmetic operation, a dynamic control of power dissipation, and a logic-in-memory architecture utilizing nonvolatile devices.
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DOI:
10.1093/ietele/e91-c.9.1419
发表时间:
2008-09
期刊:
2007 IEEE Asian Solid-State Circuits Conference
影响因子:
--
作者:
[M. Hariyama;S. Ishihara;M. Kameyama]
通讯作者:
M. Hariyama;S. Ishihara;M. Kameyama
非同期ビットシリアルアーキテクチャに基づくフィールドプログラマブルVLSIの構成
基于异步位串行架构的现场可编程VLSI配置
DOI:
--
发表时间:
2007
期刊:
電気関係学会東北支部連合大会 2E18
影响因子:
--
作者:
[石原翔太, 張山昌論, 亀山充隆]
通讯作者:
亀山充隆
超高速ステレオビジョンVLSIプロセッサの設計
超高速立体视觉VLSI处理器设计
DOI:
--
发表时间:
2007
期刊:
第13回画像センシングシンポジウム予稿集
影响因子:
--
作者:
[張山昌論, 横山直人, 吉田恒, 亀山充隆]
通讯作者:
亀山充隆
GA-Based Assignment of Supply and Threshold Voltages and Interconnection Simplification for Low Power VLSI Design
基于 GA 的电源和阈值电压分配以及低功耗 VLSI 设计互连简化
DOI:
--
发表时间:
2006
期刊:
IEEE Asia Pacific Conference on Circuits and Systems
影响因子:
--
作者:
[Waidyasooriya Hasitha Muthumala, Masanori Hariyama, andMichitaka, Kameyama]
通讯作者:
Kameyama
高安全知能自動車用VLSIプロセッサの性能仕様の決定法
高安全智能汽车VLSI处理器性能指标确定方法
DOI:
--
发表时间:
2005
期刊:
第5回計測自動制御学会制御部門大会
影响因子:
--
作者:
[坂井勇太, 亀山充隆]
通讯作者:
亀山充隆
共 47 条
Multiple-Valued Reconfigurable VLSI Based on Adaptively Autonomous Operation
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批准号:23656230
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项目类别:Grant-in-Aid for Challenging Exploratory Research
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资助金额:$2.41万
-
财政年份:2011
-
负责人:KAMEYAMA Michitaka
-
依托单位:
Development of VLSI Processor Chip Family for Highly-Safe Intelligent Vehicles Based on Optimal Design Mythologies
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批准号:12555119
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$4.61万
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财政年份:2000
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负责人:KAMEYAMA Michitaka
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依托单位:
Development of a Chip Family for Ultra-Highly-Parallel Multiple-Valued Integrated Circuits and Its Applications
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批准号:09558025
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$5.38万
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财政年份:1997
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负责人:KAMEYAMA Michitaka
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依托单位:
High-Level Synthesis of High-Performance VLSI Processors for Intelligent Integrated System
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批准号:09450162
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$4.35万
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财政年份:1997
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负责人:KAMEYAMA Michitaka
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依托单位:
Study on Multiple-Valued VLSI Processors for a Highly Safe Intelligent Vehicle
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批准号:07558151
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$0.45万
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财政年份:1995
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负责人:KAMEYAMA Michitaka
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依托单位:
Ultra-Parallel and Ultra-High-Speed Architecture for Ultimate Integration
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批准号:07248102
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项目类别:Grant-in-Aid for Scientific Research on Priority Areas
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资助金额:$111.04万
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财政年份:1995
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负责人:KAMEYAMA Michitaka
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依托单位:
Ultra-Highly-Parallel Arithmetic and Logic Circuits and Their Multiple-Valued Integration
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批准号:06452386
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$3.71万
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财政年份:1994
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负责人:KAMEYAMA Michitaka
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依托单位:
Development of VLSI Processors for Robot Control with Ultra-High Performance in the Arithmetic Delay
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批准号:04555076
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项目类别:Grant-in-Aid for Developmental Scientific Research (B)
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资助金额:$5.82万
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财政年份:1992
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负责人:KAMEYAMA Michitaka
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依托单位:
Study on Post-Binary ULSI Sstems
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批准号:04044024
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项目类别:Grant-in-Aid for international Scientific Research
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资助金额:$2.18万
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财政年份:1992
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负责人:KAMEYAMA Michitaka
-
依托单位:
Ultra-Many-Valued, Highly Parallel Computing System for Biochip Implementation
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批准号:03805033
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项目类别:Grant-in-Aid for General Scientific Research (C)
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资助金额:$1.09万
-
财政年份:1991
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负责人:KAMEYAMA Michitaka
-
依托单位:
Implementation of an Ultra-Higyly Parallel Residue Arithemtic Integrated Circuit Based on Multiple-Vlaued Logic and its Evaluation
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批准号:01850085
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项目类别:Grant-in-Aid for Developmental Scientific Research (B).
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资助金额:$1.54万
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财政年份:1989
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负责人:KAMEYAMA Michitaka
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依托单位:
VLSI-Based Robot Electronics System
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批准号:63550297
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项目类别:Grant-in-Aid for General Scientific Research (C)
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资助金额:$1.41万
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财政年份:1988
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负责人:KAMEYAMA Michitaka
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依托单位:
LSI-Oriented Digital Signal Processing System Based on Residue Arithemtic Circuits and Its Comprehensive Evaluation
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批准号:59850066
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项目类别:Grant-in-Aid for Developmental Scientific Research
-
资助金额:$1.54万
-
财政年份:1984
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负责人:KAMEYAMA Michitaka
-
依托单位:
海外基金