Continuation of Research in MOS Data Acquisition Circuits

这个项目正在研究MOS数据采集电路。研究的目的是确定限制MOS模拟-数字接口电路性能的基本因素，并研究接近这些基本限制的合成体系结构。研究的具体主题包括自校准流水线A/D电路，视频编解码器，采样和保持电路中基本性能限制的研究，A/D转换器中的并发模拟处理，以及A/D接口应用的混合级模拟。

This project is investigating MOS data acquisition circuits. The research is directed toward establishing the fundamental factors which limit the performance of MOS analog-digital interface circuits, and toward synthesizing architectures which closely approach those fundamental limits. Specific topics for investigation include self- calibrated pipelined A/D circuits, video CODEC's, investigation of fundamental performance limits in sample and hold circuits, concurrent analog processing in A/D converters, and mixed-level simulation for A/D interface applications.