FSM Decomposition for Area and Performance Optimization: From Function to Layout

本研究的目标是开发一套完整的 时序电路的逻辑和物理设计工具 具有减小的面积和改进的性能。 拟议研究 正在开发分析技术， 电路的功能和物理分解， 以最小化面积并最大化性能（或找到交易 两者之间）。 时序电路的分解算法 一组相互作用的同步有限状态机（FSM） 正在接受调查 方法是找到一组 机器状态的广义划分，使得每个机器 状态可以被实现为单独的机器。 机器 与这些分区相对应的分区在一个或多个分区中彼此交互。 更复杂的时尚比那些衍生的基础上，古典 封闭分区理论 例如，在这个组织中， 一台机器可以通过使用它们的状态位来依赖于其他机器， 主要投入。

The goal of this research is the development of an integrated set of tools for the logical and physical design of sequential circuits with reduced area and improved performance. The proposed research is developing analytical techniques for synthesis of sequential circuits by means of functional and physical decompositions so as to minimize the area and maximize the performance (or find a trade off between the two). Algorithms to decompose a sequential circuit into a set of interacting synchronous finite state machines (FSM's) are being investigated. The approach is to find a set of generalized partitions of machine states, so that each machine state can be implemented as a separate machine. The machines corresponding to those partitions interact with each other in a more complex fashion than those derived on the basis of classical theory of closed partitions. For example, in this organization one machine may depend on other machines by using their state bits as primary inputs.