Compiler Optimizations to Exploit Simultaneous Multithreading

最近引入和即将推出的多线程处理器体系结构为编译系统带来了新的挑战和机遇。这项建议将集中在三个方面，利用同步多线程(SMT)处理器的特征：1.生成任务线程和辅助线程-基于任务的并行提供了对SMT处理器特别有效的异类并行。帮助器线程帮助并加速其他线程的执行，而不一定要卸载任何计算。同时编译--使用空闲上下文进行动态编译、优化和性能分析，可以在运行程序的同时、连续地执行这些功能，而不会中断其他线程。SMT的程序布局-在SMT处理器上高效地使用内存层次结构更加困难，因为程序以不确定的方式交互。新颖的代码、数据和页面放置编译器算法将减少多线程工作负载的缓存未命中。这项研究将涉及研究生和本科生，包括来自代表性不足群体的学生，培训他们研究方法和实践，并发展特定的研究专业知识。这项研究将创建一个编译器和模拟基础设施，将广泛提供给其他学术机构。这应该会让那些缺乏资源自行开发此类基础设施的机构受益最大。

Recently introduced and forthcoming multithreading processor architectures represent new challenges and opportunities for the compilation system.This proposal will focus on three areas, exploiting features of a simultaneous multithreading (SMT) processor:1. Generating Task Threads and Helper Threads - Task-based parallelism provides heterogeneous parallelism that is particularly effective for an SMT processor. Helper threads assist and accelerate the execution of other threads, without necessarily offloading any computation.2. Simultaneous Compilation - Using spare contexts to do dynamic compilation, optimization, and profiling provides the opportunity to perform these functions concurrent with the running program, and continuously, without interrupting other threads.3. Program Placement for SMT - Efficiently using the memory hierarchy is more difficult on an SMT processor because programs interact in non-deterministic ways. Novel code, data, and page placement compiler algorithms will reduce cache misses for multithreaded workloads.This research will involve grad and undergrad students, including students from underrepresented groups, training them in research methodology and practice, and developing particular research expertise. This research will create a compiler and simulation infrastructure that will be made available widely to other academic institutions. This should most benefit institutions that lack resources to develop such an infrastructure themselves.