SHF: Small: Communication Architecture Designs for Future Heterogeneous Systems

大数据已经出现在各种以数据为中心的应用中，包括深度学习和图形处理。这些应用程序显示了流处理或不规则数据访问模式等特征。然而，具有通用指令集架构和内存的现代基于cpu的架构会带来很大的性能开销。为了解决这个问题，采用特定于应用程序的组件和异构处理单元（如gpu和加速器）正变得越来越流行。随着数据量的增加，需要更高效的数据处理，这就需要高密度的计算和更大的数据移动带宽，这就激发了对大规模异构系统的需求。与基于cpu的系统不同，异构系统中的通信可能对延迟和吞吐量有动态和灵活的需求，具体取决于应用程序和涉及的处理器。此外，由于高成本和低成品率，设计大型单片芯片是不切实际的，因此首选具有成本效益和设计效率的基于芯片的模块化设计。本项目研究异构系统的通信架构设计，以加速以数据为中心的应用程序。它包括互连基础的研究，如死锁自由、路由、流量控制和拓扑设计，以提供正确的功能并满足异构通信需求。为了减少架构内的数据移动，将研究通过专业化的网络内计算和通信加速解决方案，以提高异构系统的性能和能源效率。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

Big data have emerged in various data-centric applications including deep learning and graph processing. These applications show characteristics such as stream processing or irregular data access patterns. However, modern CPU-based architectures with general-purpose instruction-set architectures and memory incur large performance overheads. To remedy this problem, adopting application-specific components and heterogeneous processing units, like GPUs and accelerators, is gaining popularity. As data size increases, more efficient data processing is required, which demands high-density computation and larger bandwidth for data movements, which motivates the need for large-scale heterogeneous systems. Unlike CPU-based systems, the communication in heterogeneous systems may have dynamic and flexible requirements for both latency and throughput depending on applications and involved processors. In addition, since designing a large monolithic chip is impractical due to high cost and low yield rate, cost-effective and design-efficient chiplet-based modular designs are preferred. This project studies the design of communication architectures for heterogeneous systems to accelerate data-centric applications. It includes research in the fundamentals of interconnects such as deadlock-freedom, routing, flow control, and topology designs, to provide correct functionalities and fulfill heterogeneous communication requirements. To reduce data movements inside the architectures, in-network computing and communication-acceleration solutions through specialization will be investigated to improve performance and energy efficiency of the heterogeneous systems.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.