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Development of a Functional LSI Achieving Low-rate Multimedia Data Transmission.

Development of a Functional LSI Achieving Low-rate Multimedia Data Transmission.
开发实现低速率多媒体数据传输的功能LSI。
批准号:
10450136
负责人:
ONODERA Hidetoshi
金额:
$6.98万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B).
财政年份:
1998
资助国家:
日本
项目状态:
已结题
起止时间:
1998 至 2000

项目摘要

项目成果

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中文摘要
翻译
本研究计画的主要目的是发展一个包含低功率系统的多媒体通讯系统,此系统是为即时低速率影像压缩与解压缩而开发。(1)一种使用矢量量化的低速率视频压缩算法:FRMSHVQ FRMSHVQ代表固定速率多级分层矢量量化。它可以压缩10 fps。Q-CIF(176×144)视频序列到29.2kbps。FRMSHVQ使用矢量量化代替MPEG上的DCT,与MPEG上的IDCT操作相比,该特征通过使用表查找而使得容易解压缩。(2)用于FRMSHVQ的低功耗DSP:VP-DSP是一种矢量流水线DSP,它的寄存器文件中包含多个长位(160位)寄存器,用于FRMSHVQ中常用的16个并行SIMD操作。所实现的大规模集成电路在25 MHz和1.6V电压下工作正常,真实的功耗仅为49 mW。时间编码/解码10 fps。QCIF视频序列。
英文摘要
The main goal of this research project is to develop a multimedia communication system including low-power system-LSIs that are developed for real-time low-rate image compression and decompression.This research develops two innovative results as follows.(1) A Low-rate Video Compression Algorithm using Vector-Quantization : FRMSHVQ FRMSHVQ stands for fixed-rate multistage Hierarchical Vector Quantization. It can compress a 10fps. Q-CIF (176×144) video sequence to 29.2kbps. FRMSHVQ uses vector quantization instead of DCT on MPEG which feature enables easy decompression by using a table look-up compared with IDCT operation on MPEG.(2) A Low-power DSP for FRMSHVQ : VP-DSP We have developed and implemented a low-power DSP for the FRMSHVQ algorithm called VP-DSP.VP-DSP stands for a vector-pipeline DSP.The register file of VP-DSP contains several long-bit (160-bit) registers for 16-parallel SIMD operations frequently used on FRMSHVQ.The implemented LSI works properly at 25MHz and 1.6V.The power dissipation is only 49mW for real-time encoding/decoding of a 10fps. QCIF video sequence.
期刊论文(30)
专著(0)
科研奖励(0)
会议论文
T.Iwahashi, T.Shibayama, M.Hahsimoto, K.Kobayashi, H.Onodera: "Vector Quantization Processor for Mobile Video Communication."Proc.of 13th IEEE SOC/ASIC Conference. 2000. 75-79 (2000)
T.Iwahashi、T.Shibayama、M.Hahsimoto、K.Kobayashi、H.Onodera:“用于移动视频通信的矢量量化处理器”。第 13 届 IEEE SOC/ASIC 会议的会议记录。
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通讯作者:
H.Onodera,K.Kobayashi: "Vector Quantization Processor for Mobile Video Communication."Proc.of 13th IEEE SOC/ASIC Conference 2000. 75-79 (2000)
H.Onodera,K.Kobayashi:“用于移动视频通信的矢量量化处理器。”Proc.of 13th IEEE SOC/ASIC Conference 2000. 75-79 (2000)
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通讯作者:
H.Onodera,K.Kobayashi: "Architecture and Performance Evaluation of a New Functional Memory : Functioal Memory for Addition"IEICE Transactions Fundamentals. E83-A(12). 2400-2408 (2000)
H.Onodera、K.Kobayashi:“新功能存储器的架构和性能评估:用于加法的功能存储器”IEICE 交易基础知识。
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H.Onodera,K.Kobayashi: "Architecture and Performance Evaluation of a New Functional Memory : Functional Memory for Addition"IEICE Transactions Fundamentals. E83-A(12). 2400-2408 (2000)
H.Onodera、K.Kobayashi:“新功能存储器的架构和性能评估:加法功能存储器”IEICE Transactions Fundamentals。
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共 14 条
    LSI design methodology that enables robust operation under the supply as low as threshold voltage by self-compensating performance variability
    • 批准号:
      25280014
    • 项目类别:
      Grant-in-Aid for Scientific Research (B)
    • 资助金额:
      $11.65万
    • 财政年份:
      2013
    • 负责人:
      ONODERA Hidetoshi
    • 依托单位:
    Integrated Circuit Design for Robust Operation under Low Supply Voltage
    • 批准号:
      22300016
    • 项目类别:
      Grant-in-Aid for Scientific Research (B)
    • 资助金额:
      $11.81万
    • 财政年份:
      2010
    • 负责人:
      ONODERA Hidetoshi
    • 依托单位:
    Variation and Defect Aware Design of Integrated Circuits
    • 批准号:
      19300010
    • 项目类别:
      Grant-in-Aid for Scientific Research (B)
    • 资助金额:
      $12.23万
    • 财政年份:
      2007
    • 负责人:
      ONODERA Hidetoshi
    • 依托单位:
    Research of a High-speed Signal Transmission Scheme for Integrated Circuits
    • 批准号:
      14350186
    • 项目类别:
      Grant-in-Aid for Scientific Research (B)
    • 资助金额:
      $10.88万
    • 财政年份:
      2002
    • 负责人:
      ONODERA Hidetoshi
    • 依托单位:
    海外基金