Study on fabrication method for ultra-small transistors by means of selective atomic-layer deposition

本研究的目的是开发一种新的方法，通过选择原子层沉积硅(Si)来制造超小型晶体管，这是传统的光刻方法不可能实现的。在由不同材料组成的层叠结构的边缘，如果只在特定的材料上选择性地沉积硅，则MOS晶体管的栅长可以由沉积薄膜的厚度来控制。在本研究中，该方法得到了发展。所获得的结果摘要如下1.建立了氮化硅的选择原子层沉积方法，为本课题的研究奠定了基础。发展了一种选择性原子层沉积硅的方法，即通过间歇曝光Si2H6气体，只在氮化硅上沉积Si膜，在SiO_2上沉积少量的Si膜。利用上述方法，在…上制备了宽21 nm、厚28 nm的超窄硅线更多的爱德。与传统的光刻和干法刻蚀方法制备的硅线相比，硅线的电阻率约为1/5。利用Si_2H_6和SiCl4交替供电的方法，发展了原子层沉积表面非常光滑的硅的方法，沉积速率为两个单层/一个沉积周期。采用低压化学气相沉积SiH4制备多晶(多晶硅)线材(最小宽度为95 nm，最小厚度为7 nm)，然后进行电子束光刻和干法刻蚀，作为评价窄硅线性能的初步研究。并对其电学特性进行了测量。结果表明，在较低温度(5~80K)下观察到了库仑阻塞效应，并提出了窄线多晶硅的电子传导机制。观察到选择性原子层沉积硅窄线在低压区的电流抑制现象，这可能是由于库仑阻塞效应引起的。较少

The purpose of this study is to develop a new method for fabrication of ultrasmall transistors, which is impossible by the conventional lithography method, by means of the selective atomic-layer deposition of silicon (Si). At the edge of the stacked layered structures consisting of different materials, if the selective deposition of Si occurs only on the specific material, the gate length of the MOS transistors can be controlled by the thickness of the deposited film. In this study, this method is developed. The summary of the obtained results is listed below.1. The selective atomic-layer deposition method of silicon nitride is developed, which is the basis of this study.2. The selective atomic-layer deposition method for Si is developed, in which the Si film is deposited only onto the silicon nitride and very small amount deposition on SiO_2, by means of the intermittent exposure of Si_2H_6 gas.3. By using the above method, very narrow Si wires (21 nm wide and 28 nm thick) is fabricat … More ed. The resistivity of the Si wires is about 1/5 compared with that fabricated by the conventional method using lithography and dry etching.4. Atomic-layer deposition method of Si with very smooth surface is developed by using the alternative supply of Si_2H_6 and SiCl_4, in which the deposition rate is two mono-layers per one deposition cycle.5. As the preliminary study for the evaluation of the narrow Si wires, the polycrystalline (poly-) Si wires (minimum width of 95 nm and minimum thickness of 7 nm) were fabricated by using the low-pressure chemical vapor deposition of SiH_4, followed by the electron-beam lithography and dry etching. And the electrical characteristics were measured. As the result the Coulomb blockade effect was observed at low temperatures (5〜80 K) and the electronic conduction mechanism in the narrow poly-Si wires were proposed.1. The current suppression phenomenon at the low-voltage region, which might be caused by the coulomb blockade effect, was observed for the Si narrow wires fabricated by the selective atomic-layer deposition. Less