Fluctuations of Characteristics in Sub-0.1mum Thin Film SOI CMOS LSI Devices
Fluctuations of Characteristics in Sub-0.1mum Thin Film SOI CMOS LSI Devices
批准号:
07555109
负责人:
HIRAMOTO Toshiro
金额:
$6.78万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (A)
财政年份:
1995
资助国家:
日本
项目状态:
已结题
起止时间:
1995 至 1997
中文摘要
薄膜SOI CMOS器件在未来的大规模集成电路器件中备受关注。当器件按比例缩小到0.1 μ m以下时,波动问题占主导地位。本研究的目的是研究在低于0.1 μ m的SOI MOSFET中器件特性的波动,并提出一种补偿这些波动的新技术。我们制备了薄膜SOI MOSFET。通过实验测量和仿真处理了波动问题。首先,讨论了SOI厚度波动与阈值电压波动之间的关系。结果表明,栅极宽度小于SOI厚度波动周期时,阈值电压波动较大。这一结果表明,极窄栅极宽度的SOI dram在未来将存在波动问题。其次,建立了SOI器件的标度方法,并基于标度理论讨论了SOI通道中掺杂原子的随机波动。结果表明,薄膜SOI器件可以在不增加杂质浓度的情况下缩小尺寸,并且由于随机波动引起的器件特性波动在SOI器件中比在本体器件中要小得多。
英文摘要
Thin film SOI CMOS Devices have attracted much attention for future LSI devices. When the devices are scaled down to sub-0.1mum regime, fluctuation problems are dominant. The purpose of this study is to investigate the fluctuations of the device characteristics in sub-0.1 mum SOI MOSFET and to propose a new technique to compensate these fluctuations. We have fabricated the thin film SOI MOSFET.The fluctuation problems are addressed by both experimental measurements and simulation. First, the relation between the SOI thickness fluctuations and threshold voltage fluctuations are discussed. It is elucidated that the threshold voltage fluctuations become larger when the gate width is smaller than the period of the SOI thickness fluctuations. This result suggests that the SOI DRAMs which have very narrow gate width will have the fluctuation problem in the future. Next, the scaling methodology for SOI device is developed and the stochastic fluctuations of dopant atoms in SOI channel is discussed based on the scaling theory. It is concluded that the thin film SOI devices can be scaled down without the increase in impurity concentration and that the fluctuations of device characteristics due to the stochastic fluctuations are much smaller in SOI device than in bulk devices.
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平本 俊郎: "VLSI用薄膜SOI MOSデバイスに関する研究動向調査" 生産研究. 48・11. 568-569 (1996)
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T. Hiramoto: "Characterization of Precisely Widthy-Controlled Si Quantum Wires Fabricated on SOI Substrates" Abstracts of 3rd International Symposium on New Phenomena in Mesoscoopic Structures, Maui, Hawaii. 296-299 (1995)
T. Hiramoto:“在 SOI 衬底上制造的精确宽度控制的硅量子线的表征”第三届介观结构新现象国际研讨会摘要,夏威夷毛伊岛。
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H. Ishikuro: "Trasconductance Oscillations in a very narrow, short channel MOSFET with a split-gate fabricated on an SOT substrate" Abstracts of International Workshop on Mesoscoplc Physics and Electronics, Tokyo. 82-83 (1995)
H. Ishikuro:“在 SOT 基板上制造的带有分栅的极窄短沟道 MOSFET 中的跨导振荡”,东京介观物理与电子国际研讨会摘要。
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更屋 拓哉: "0.15μm部分空乏型SOI MOSFETにおける1V以下での基板浮遊効果" 生産研究. 49,4. 231-234 (1997)
Takuya Saraya:“0.15μm 部分耗尽 SOI MOSFET 中低于 1V 的衬底浮动效应”生产研究 49,4 (1997)。
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高宮 真: "低消費電力用完全空乏型SOI MOSFETのスケーリング指針とBulk MOSFETとの比較" 電子情報通信学会技術研究報告. SDM97・115. 87-94 (1998)
Makoto Takamiya:“低功耗全耗尽型 SOI MOSFET 的缩放指南以及与体 MOSFET 的比较”IEICE 技术报告 87-94 (1998)。
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共 18 条
Basic research on influence of single impurity atom on statistics of nanoscale transistor characteristics
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Basic research on ultra-low voltage MOS transistors aiming at sub-100mV operation
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Nano MOSFET Fluctuations and Device Integrity
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A research on silicon nano-devices for single-electron, quantum, CMOS integrated circuits operating at room temperature
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Exploration of Physics and Integration of Nano-Scale MOSEFET with Suppressed Fluctuations
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Fabrication of Silicon Nano-Devices with High Controllability beyond Lithography Limit
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依托单位:
Study on Performance Increase and Fluctuation Suppression in Thin Film SOI MOSFET by utilizing quantum effects
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Investigation of Oxidation Mechanisms in SOI Structures
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负责人:HIRAMOTO Toshiro
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依托单位:
海外基金