Inelastic Electron Tunneling Spectroscopy Studies of Advanced Gate Dielectrics

该项目有两个相关的推动力;非弹性电子隧穿光谱（IETS）的应用，以实现更大的理解和改善栅极氧化物，以及喷射气相沉积（JVD）的材料科学。由于栅极氧化物只有几个单层厚，传统的电介质表征工具，如红外光谱和拉曼光谱，越来越难以准确地揭示结构和成分信息。此外，大的栅极漏电流也使得许多广泛使用的电测量，例如C-V、G-V和电荷泵，要么极其困难，要么不可能实现。IETS依赖于隧穿电流来探测金属-绝缘体-半导体（MIS）三明治结构中的超薄栅电介质，并且当隧穿电流增加时变得更加敏感。来自IETS的信息的示例包括栅电极的声子模式、衬底的声子模式、栅极电介质的各种振动模式、栅极电介质中的键合结构和杂质、陷阱以及其他电子缺陷;所有这些都可以在小于10 - 9 cc的样品体积上获得。 期望更好地理解隧穿电子和栅极电介质之间的相互作用。从IETS中获得的信息将与用相同栅压的CMOS器件的特性相关联，目标是优化高k栅压。该项目涉及材料科学专题领域的基础研究问题，具有高度的技术相关性。这些研究将提高对门极微电子学的基本理解，门极微电子学是先进硅基微电子学的关键。该计划的一个重要特点是通过在一个基本和技术上重要的领域对学生进行培训来整合研究和教育。***

This project has two related thrusts; the application of Inelastic Electron Tunneling Spectroscopy(IETS) to achieve greater understanding and improvement of gate oxides, and the materials science of jet vapor deposited(JVD) dielectrics. With gate oxides only a few monolayers thick, it becomes increasingly difficult for conventional dielectric characterization tools, such as infrared spectroscopy and Raman spectroscopy to reveal structural and compositional information accurately. In addition, large gate leakage currents also make a number of widely used electrical measurements, such as C-V, G-V, and charge-pumping, either extremely difficult or impossible to implement. IETS relies on tunneling current to probe the ultra-thin gate dielectric in a metal-insulator-semiconductor (MIS) sandwich and becomes more sensitive when the tunneling current increases. Examples of information from IETS include phonon modes of the gate electrode, phonon modes of the substrate, various vibrational modes of the gate dielectric, bonding structures and impurities in the gate dielectric, and traps as well as other electronic defects; all can be obtained on a sample volume of less than 10 -9 cc. Better understanding of the interactions between the tunneling electrons and the gate dielectric is expected. Information obtained from IETS will be correlated with characteristics of CMOS devices made with the same gate dielectrics, with a goal toward the optimization of high-k gate dielectrics.%%% The project addresses basic research issues in a topical area of materials science with high technological relevance. These studies will improve the fundamental understanding of gate dielectrics, which are key to advanced silicon-based microelectronics. An important feature of the program is the integration of research and education through the training of students in a fundamentally and technologically significant area. ***