Inelastic Electron Tunneling Spectroscopy Studies of Advanced Gate Dielectrics

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This project has two related thrusts; the application of Inelastic Electron Tunneling Spectroscopy(IETS) to achieve greater understanding and improvement of gate oxides, and the materials science of jet vapor deposited(JVD) dielectrics. With gate oxides only a few monolayers thick, it becomes increasingly difficult for conventional dielectric characterization tools, such as infrared spectroscopy and Raman spectroscopy to reveal structural and compositional information accurately. In addition, large gate leakage currents also make a number of widely used electrical measurements, such as C-V, G-V, and charge-pumping, either extremely difficult or impossible to implement. IETS relies on tunneling current to probe the ultra-thin gate dielectric in a metal-insulator-semiconductor (MIS) sandwich and becomes more sensitive when the tunneling current increases. Examples of information from IETS include phonon modes of the gate electrode, phonon modes of the substrate, various vibrational modes of the gate dielectric, bonding structures and impurities in the gate dielectric, and traps as well as other electronic defects; all can be obtained on a sample volume of less than 10 -9 cc. Better understanding of the interactions between the tunneling electrons and the gate dielectric is expected. Information obtained from IETS will be correlated with characteristics of CMOS devices made with the same gate dielectrics, with a goal toward the optimization of high-k gate dielectrics.%%% The project addresses basic research issues in a topical area of materials science with high technological relevance. These studies will improve the fundamental understanding of gate dielectrics, which are key to advanced silicon-based microelectronics. An important feature of the program is the integration of research and education through the training of students in a fundamentally and technologically significant area. ***