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Si/SiGe Multiple-Barrier Resonant Tunneling Diode and Its Integrated Technology

Si/SiGe多势垒谐振隧道二极管及其集成技术

基本信息

批准号：
14350179
负责人：
SUDA Yoshiyuki
金额：
$ 9.22万
依托单位：
National University Corporation Tokyo University of Agriculture and Technology
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (B)
财政年份：
2002
资助国家：
日本
起止时间：
2002 至 2004
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/en/grant/KAKENHI-PROJECT-14350179/
关键词：
SiGe Resonant Tunneling Device RTD High Speed Device Strain Relaxation Quantum Well PVCR Multiple Barrier

项目摘要

The head investigator has succeeded in fabricating a Si/SiGe resonant tunneling diode(RTD) which exhibits a peak-to-valley current ratio of as high as 7.6 in 1998 by applying a combination of electron tunneling and a multiple well structure on the basis of theoretical calculation. Further, we have proposed a thin double-layer strain-relaxed buffer as important technology for the electron-tunneling Si/SiGe RTD fabrication and have obtained a PVCR value of as high as〜180.In this work, in order to realize quantum-effect high-speed Si-system devices, on the basis of these achievements, we aimed at establishing electron-tunneling Si/SiGe RTD device technology and basic technology for the device integration.First, we have cleared the strain-relaxation mechanisms for the thin double-layer strain-relaxed buffer and its fabrication conditions. The 1st buffer layer grows coherently, however, upon 10-nm 2nd buffer layer growth, the 1st layer relaxes and the surface threading dislocation remains l … More ow. Thus, we have cleared that the 2nd buffer layer relaxes the 1st buffer layer and restrains the threading dislocations form propagating to the surface. On the basis of the results, we have further proposed a thin triple-layer buffer with which the positions of the lattice mismatch dislocation can be better controlled. We have cleared the fabrication principle and conditions. With the thin triple-layer buffer, we have a strain-relaxed buffer with high crystallinity and high relaxation rate, and have succeeded in fabricating high performance Si/SiGe RTD, the PVCR of which surpasses III-V RTDs. With these experimental results, we demonstrate that Si/SiGe quantum well tunneling structures are very useful as a practical device. Further, as basic integration technology, we have developed current density control method and device isolation technology.Through these works, we have cleared the Si/SiGe RTD device construction technology and the basic integration technology such as device current control and device isolation technology. In this project, we have achieved the technological fundamentals for Si/SiGe electron-tunneling RTD device technology. Less

在理论计算的基础上，采用电子隧穿和多势垒结构相结合的方法，在1998年成功地制作出了峰谷电流比高达7.6的Si/SiGe共振隧穿二极管(RTD)。此外，我们还提出了薄双层应变弛豫缓冲器作为制备电子隧道Si/SiGe RTD的重要技术，并获得了高达~180的PVCR值。在这项工作中，为了实现量子效应的高速硅系统器件，我们在这些成果的基础上，致力于建立电子隧道Si/SiGe RTD器件技术和器件集成的基础技术。第一个缓冲层是共格生长的，而在10 nm第二个缓冲层生长后，第一个缓冲层松弛，表面穿线位错保持L…更多的现在。因此，我们已经清楚了，第二缓冲层松弛了第一缓冲层，并抑制了线状位错向表面的传播。在此基础上，我们进一步提出了一种可以更好地控制晶格失配位错位置的薄三层缓冲层。我们已经明确了制作原理和条件。利用这种薄的三层缓冲层，我们获得了高结晶度和高弛豫速率的应变弛豫缓冲层，并成功地制备了高性能的Si/SiGe RTD，其PVCR超过了III-V RTD。通过这些实验结果，我们证明了Si/SiGe量子阱隧道结构作为一种实用的器件是非常有用的。此外，作为基本的集成技术，我们开发了电流密度控制法和器件隔离技术，通过这些工作，我们已经明确了Si/SiGe RTD器件的构造技术和器件电流控制和器件隔离技术等基础集成技术。在这个项目中，我们已经完成了Si/SiGe电子隧道RTD器件技术的技术基础。较少