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Si/SiGe Multiple-Barrier Resonant Tunneling Diode and Its Integrated Technology

Si/SiGe多势垒谐振隧道二极管及其集成技术

基本信息

批准号：
14350179
负责人：
SUDA Yoshiyuki
金额：
$ 9.22万
依托单位：
National University Corporation Tokyo University of Agriculture and Technology
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (B)
财政年份：
2002
资助国家：
日本
起止时间：
2002 至 2004
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/en/grant/KAKENHI-PROJECT-14350179/
关键词：
SiGe Resonant Tunneling Device RTD High Speed Device Strain Relaxation Quantum Well PVCR Multiple Barrier

项目摘要

The head investigator has succeeded in fabricating a Si/SiGe resonant tunneling diode(RTD) which exhibits a peak-to-valley current ratio of as high as 7.6 in 1998 by applying a combination of electron tunneling and a multiple well structure on the basis of theoretical calculation. Further, we have proposed a thin double-layer strain-relaxed buffer as important technology for the electron-tunneling Si/SiGe RTD fabrication and have obtained a PVCR value of as high as〜180.In this work, in order to realize quantum-effect high-speed Si-system devices, on the basis of these achievements, we aimed at establishing electron-tunneling Si/SiGe RTD device technology and basic technology for the device integration.First, we have cleared the strain-relaxation mechanisms for the thin double-layer strain-relaxed buffer and its fabrication conditions. The 1st buffer layer grows coherently, however, upon 10-nm 2nd buffer layer growth, the 1st layer relaxes and the surface threading dislocation remains l … More ow. Thus, we have cleared that the 2nd buffer layer relaxes the 1st buffer layer and restrains the threading dislocations form propagating to the surface. On the basis of the results, we have further proposed a thin triple-layer buffer with which the positions of the lattice mismatch dislocation can be better controlled. We have cleared the fabrication principle and conditions. With the thin triple-layer buffer, we have a strain-relaxed buffer with high crystallinity and high relaxation rate, and have succeeded in fabricating high performance Si/SiGe RTD, the PVCR of which surpasses III-V RTDs. With these experimental results, we demonstrate that Si/SiGe quantum well tunneling structures are very useful as a practical device. Further, as basic integration technology, we have developed current density control method and device isolation technology.Through these works, we have cleared the Si/SiGe RTD device construction technology and the basic integration technology such as device current control and device isolation technology. In this project, we have achieved the technological fundamentals for Si/SiGe electron-tunneling RTD device technology. Less

1998年，首席研究员成功地制造了Si/SiGe共振隧穿二极管（RTD），该二极管在理论计算的基础上，通过应用电子隧穿和多阱结构的组合，表现出高达7.6的峰谷电流比。在此基础上，我们提出了一种薄的双层应变弛豫缓冲层作为电子隧穿Si/SiGe RTD的重要制作技术，并获得了高达180的PVCR值。为了实现量子效应的高速Si系器件，在此基础上，我们旨在建立电子隧穿Si/SiGe RTD器件技术和器件集成的基础技术。我们已经明确了薄双层应变弛豫缓冲层的应变弛豫机制及其制造条件。第一层缓冲层是共格生长的，然而，在10-nm的第二层缓冲层生长时，第一层弛豫，并且表面穿透位错仍然存在。 ...更多信息哦因此，我们已经清楚，第二缓冲层弛豫的第一缓冲层，并限制了线程位错传播到表面。在此基础上，我们进一步提出了一种薄的三层缓冲层，它可以更好地控制晶格失配位错的位置。我们已经明确了制造原则和条件。利用薄的三层缓冲层，我们获得了高结晶度和高弛豫速率的应变弛豫缓冲层，并成功地制备了高性能的Si/SiGe RTD，其PVCR超过了III-V RTD。这些实验结果表明，Si/SiGe量子阱隧穿结构是非常有用的，作为一个实用的器件。在此基础上，提出了电流密度控制方法和器件隔离技术，明确了Si/SiGe RTD器件的构建技术和器件电流控制、器件隔离技术等基本集成技术。在本计画中，我们已达成矽/矽锗电子穿隧式热电阻器之技术基础。少