Research on Wave Phenomena of Hot Electron at the Insulator Interface and Its Application to Functional Electron Devices

本研究旨在观察金属-绝缘体多层异质结中新的量子尺寸效应及其在功能电子器件中的应用，这种效应在传统的半导体异质结中很难观察到。采用低温离子束外延技术在硅衬底上生长了金属(CoSi_2)-绝缘体(CaF_2)超薄多层结构，并对硅化物金属进行了硅和钴的两步外延生长。利用这些结构，制作了一个由共振隧穿发射体和电子干涉仪组成的晶体管，用于观察注入绝缘体导带的超热电子在金属-绝缘体界面处的量子干涉。在液氮温度下观察到了热电子干扰引起的多重负阻。在负差分电阻之间的电压间隔方面，观察到的特性与理论预期是合理的，也与包括寄生元件在内的电路仿真结果一致。理论分析表明，寄生电阻和漏电流显著降低了负微分电阻的峰谷比。为了抑制寄生电阻的影响，提出了用电子束曝光法减小面内器件尺寸的方法，并建立了相应的制作工艺。根据这一工艺，制作了小尺寸晶体管，并在室温下观察到了多个负阻。对于影响晶体管特性的另一个因素--漏电流，考虑到器件特性的尺寸依赖关系，讨论了漏电流的几种来源及其与制造工艺的关系。

This research was done aiming at the observation of new quantum-size effect at the interfaces in metal-insulator multilayred heterstructures, which effect can be very little observed in conventional semiconductor heterostructures, and its application to functional electron devices. The results are summarized as follows.Metal (CoSi_2) -insulator (CaF_2) ultrathin multilayred structures were grown on silicon substrate using low-temperature ion-beam epitaxial growth technique for the insulator and the two-step epitaxy of silicon and cobalt for the silicide metal. Using these strucures, a transistor composed of resonant tunneling emitter and electron interferometer was fabricated for the observation of quantum interference at the metal-insulator interface of hot electrons injected into the insulator conduction band. Multiple negative resistance which can be attributed to the interference of hot electrons was observed at the liquid nitrogen temperature. The observed characteristics were in reasonable agreement with theoretical expectation in terms of the voltage interval between the negative differential resistance and also with the circuit simulation results including parasitic elements. It is shown theoretically that the parasitic resistance and leak current considerably degrade the peak-to-valley ratio of the negative differential resistance. In order to suppress the influence of the parasitic resistance, the reduction of the in-plane device size using electron-beam lithography was proposed, and related fabrication process was established. According to this process, a small-size transistor was fabricated and the multiple negative differential resistance was observed at room temperature. For the leak current, which is the other factor degrading the transistor characteristics, several origins and their relation to fabrication process were discussed considering the size dependence of the device characteristics.