A Study of Metal/Insulator/Semiconductor Super-Heterostructure Material Systems for Multifunctional Electron Devices

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This project aimed at fabrication of electron devices using metal/insulator/semiconductor heterostructures, in which the quantum effect takes place remarkably, and achievement of their high functional operations, in order to promote the down sizing and high density of large scale integrated circuits. The results are summarized as follows.Crystal growth of resonant tunneling structures for the quantum-effect devices was investigated by choosing CaF2/CdF2/Si heterostructure system in which high on-off ratio and multi-functional operation are expected due to large potential barrier and sharp quantized energy levels. In order to precisely control the thickness of the epitaxial layer in the nano-scale range, we proposed nano-area local epitaxy in which the growth area is restricted in 100nm-order region of the surface. By this technique, remarkable uniformity of the characteristics was achieved, and systematic experiments for the structure dependence of the electrical characteristics became … More possible for the first time. By using hydrogen-terminated substrate, the resonant tunneling structure was grown on Si(100) substrates. The negative differential resistance was obtained for the first time at room temperature for this material system on Si(100). The negative differential resistance on Si(100) was also obtained with high reproducibility using inclined substrates with an appropriate off angle by which the anti-phase boundary is less included in the grown layers.Vertical MOSFETs integrated with CaF2/CdF2/Si low-current density resonant tunneling diode between the gate and source electrodes were proposed. 50% reduction of the device area was shown to be possible in the SRAM by this structure compared with the circuits with MOSFETs only. The vertical MOSFETs with PtSi Schottky source/drain was fabricated using beam lithography. The room temperature operation was achieved for the devices with 55nm-long gates, 5 and 8nm-thick gate oxides, and 8-30nm-long channels. CaF2/CdF2 triple-barrier resonant tunneling diodes were integrated these vertical transistors, and electrical characteristics attributed to the resonant tunneling was obtained at room temperature. Less