Time-Dependent Variability: A test-proven modelling approach for systems verification and power consumption minimization

随时间变化:经过测试验证的系统验证和功耗最小化建模方法

基本信息

  • 批准号:
    EP/L010585/1
  • 负责人:
  • 金额:
    $ 56.98万
  • 依托单位:
  • 依托单位国家:
    英国
  • 项目类别:
    Research Grant
  • 财政年份:
    2014
  • 资助国家:
    英国
  • 起止时间:
    2014 至 无数据
  • 项目状态:
    已结题

项目摘要

Following the Moore's law the semiconductor industry has delivered continuous increase of systems functionality and speed over the last 50 years through the aggressive downscaling of the transistors. In the last 20 years the UK IC-design based industry has grown to a level of national and international importance. While IC designers in the past enjoyed the freedom that all transistors in a chip could be treated identically, this is no longer the case for the nano-meter sized transistors used in the present and future technologies. Statistical device-to-device variation is introduced by the discreteness of charge and granularity of matter and is inversely proportional to gate area, so that its impact on circuits increases with the reduction of transistor dimensions. When the number of logic gates in a system increases and the architecture becomes more complex, the tolerance to variability is greatly reduced. Even if two devices were identical after fabrication, they could suffer from different aging during operation, causing a time-dependent variability (TDV). TDV is becoming a major threat to the correctness of electronic systems, but there are no tools for its verification because of the lack of a complete understanding. The aim of this project is to carry out an in-depth investigation of the defects and mechanisms responsible for TDV and, based on that, to develop a test-proven TDV simulator, allowing IC designers to assess the impact of TDV on their circuits. The researchers at Glasgow University have pioneered variability simulation and the researchers at Liverpool John Moores University have specialised in experimental characterization of defects. Their highly complementary skills bring them together and make them well positioned to tackle this challenge. By working together with UK companies, the impact of their work on UK industry will be direct. The collaboration with IMEC and its industrial consortium also opens an effective impact pathway on an international scale. The successful control of TDV will deliver reliable electronic products and minimize their power consumption.
在过去的50年里,遵循摩尔定律,半导体行业通过积极缩小晶体管的尺寸,实现了系统功能和速度的不断提高。在过去的20年里,英国基于ic设计的产业已经发展到具有国家和国际重要性的水平。虽然过去的IC设计师享有芯片中所有晶体管都可以相同处理的自由,但对于目前和未来技术中使用的纳米尺寸晶体管来说,情况已不再如此。器件间的统计变化是由电荷的离散性和物质的粒度引起的,与栅极面积成反比,因此其对电路的影响随着晶体管尺寸的减小而增加。当系统中的逻辑门数量增加,体系结构变得更加复杂时,对可变性的容忍度就会大大降低。即使两个设备在制造后是相同的,它们在运行过程中也可能遭受不同的老化,从而导致时间依赖性变异性(TDV)。TDV正成为电子系统正确性的主要威胁,但由于缺乏完整的认识,目前还没有工具来验证它。该项目的目的是深入研究导致TDV的缺陷和机制,并在此基础上开发经过测试验证的TDV模拟器,使IC设计师能够评估TDV对其电路的影响。格拉斯哥大学的研究人员开创了可变性模拟的先河,利物浦约翰摩尔斯大学的研究人员专门从事缺陷的实验表征。他们高度互补的技能将他们聚集在一起,使他们能够很好地应对这一挑战。通过与英国公司合作,他们的工作将对英国工业产生直接影响。与IMEC及其产业联盟的合作也在国际范围内开辟了有效的影响途径。成功控制TDV将提供可靠的电子产品,并将其功耗降至最低。

项目成果

期刊论文数量(2)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
Interaction between hot carrier aging and PBTI degradation in nMOSFETs: Characterization, modelling and lifetime prediction
nMOSFET 中热载流子老化和 PBTI 退化之间的相互作用:表征、建模和寿命预测
  • DOI:
    10.1109/irps.2017.7936419
  • 发表时间:
    2017
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Duan M
  • 通讯作者:
    Duan M
Comparison of Si < 100 > and < 110 > crystal orientation nanowire transistor reliability using Poisson-Schrödinger and classical simulations
使用泊松-薛定谔和经典模拟比较 Si <100> 和 <110> 晶体取向纳米线晶体管的可靠性
  • DOI:
    10.1016/j.microrel.2015.06.094
  • 发表时间:
    2015
  • 期刊:
  • 影响因子:
    1.6
  • 作者:
    Gerrer L
  • 通讯作者:
    Gerrer L
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Asen Asenov其他文献

Study of gate current in advanced MOS architectures
  • DOI:
    10.1016/j.sse.2022.108345
  • 发表时间:
    2022-08-01
  • 期刊:
  • 影响因子:
  • 作者:
    Ghulam Ali Gauhar;Abhishek Chenchety;Hashish Yenugula;Vihar Georgiev;Asen Asenov;Oves Badami
  • 通讯作者:
    Oves Badami
Mobility Variations in Ultra Small Devices due to Random Discrete Dopants
  • DOI:
    10.1023/b:jcel.0000011439.27939.e3
  • 发表时间:
    2003-12-01
  • 期刊:
  • 影响因子:
    2.500
  • 作者:
    Craig Alexander;Jeremy R. Watling;Asen Asenov
  • 通讯作者:
    Asen Asenov
Numerical analysis of the new Implant-Free Quantum-Well CMOS: DualLogic approach
  • DOI:
    10.1016/j.sse.2011.05.006
  • 发表时间:
    2011-09-01
  • 期刊:
  • 影响因子:
  • 作者:
    Brahim Benbakhti;KahHou Chan;Ewan Towie;Karol Kalna;Craig Riddet;Xingsheng Wang;Geert Eneman;Geert Hellings;Kristin De Meyer;Marc Meuris;Asen Asenov
  • 通讯作者:
    Asen Asenov
Stochastic analysis of surface roughness models in quantum wires
  • DOI:
    10.1016/j.cpc.2018.03.010
  • 发表时间:
    2018-07-01
  • 期刊:
  • 影响因子:
  • 作者:
    Mihail Nedjalkov;Paul Ellinghaus;Josef Weinbub;Toufik Sadi;Asen Asenov;Ivan Dimov;Siegfried Selberherr
  • 通讯作者:
    Siegfried Selberherr

Asen Asenov的其他文献

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{{ truncateString('Asen Asenov', 18)}}的其他基金

Realistic fault modelling to enable optimization of low power IoT and Cognitive fault-tolerant computing systems
现实故障建模可优化低功耗物联网和认知容错计算系统
  • 批准号:
    EP/T023244/1
  • 财政年份:
    2021
  • 资助金额:
    $ 56.98万
  • 项目类别:
    Research Grant
Variability-aware RRAM PDK for design based research on FPGA/neuro computing
用于基于 FPGA/神经计算的设计研究的可变性感知 RRAM PDK
  • 批准号:
    EP/S000224/1
  • 财政年份:
    2018
  • 资助金额:
    $ 56.98万
  • 项目类别:
    Research Grant
Resistive switches (RRAM) and memristive behaviour in silicon-rich silicon oxides
富硅氧化硅中的电阻开关 (RRAM) 和忆阻行为
  • 批准号:
    EP/K016776/1
  • 财政年份:
    2013
  • 资助金额:
    $ 56.98万
  • 项目类别:
    Research Grant
ENIAC MOdeling and DEsign of Reliable, process variation-aware Nanoelectronic devices, circuits and systems (MODERN)
可靠的、过程变化感知的纳米电子设备、电路和系统的 ENIAC 建模和设计(现代)
  • 批准号:
    EP/G04130X/1
  • 财政年份:
    2009
  • 资助金额:
    $ 56.98万
  • 项目类别:
    Research Grant
Renaissance Germanium
文艺复兴时期的锗
  • 批准号:
    EP/F032633/1
  • 财政年份:
    2008
  • 资助金额:
    $ 56.98万
  • 项目类别:
    Research Grant
Atomic Scale Simulation of Nanoelectronic Devices
纳米电子器件的原子尺度模拟
  • 批准号:
    EP/E038344/1
  • 财政年份:
    2007
  • 资助金额:
    $ 56.98万
  • 项目类别:
    Research Grant
Novel Time-Resolved Thermal Imaging: AlGaN/GaN Heterostructure Field Effect Transistors
新型时间分辨热成像:AlGaN/GaN 异质结构场效应晶体管
  • 批准号:
    EP/D04698X/1
  • 财政年份:
    2006
  • 资助金额:
    $ 56.98万
  • 项目类别:
    Research Grant
Meeting the design challenges of the nano-CMOS electronics
应对纳米 CMOS 电子器件的设计挑战
  • 批准号:
    EP/E003125/1
  • 财政年份:
    2006
  • 资助金额:
    $ 56.98万
  • 项目类别:
    Research Grant

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Collaborative Research: Multi-scale validation of earthquake source parameters to resolve any spatial, temporal or magnitude-dependent variability at Parkfield, CA
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