VLSI power management technology

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The power consumed by modern VLSI chips under maximum performance situation could cause over-heat and even become destructive. This is especially critical in portable multimedia and telecommunication products where form factor, cooling and battery life impose very stringent limitations. In addition, a substantial amount of unwanted standby power due to the inherent CMOS leakage current is also consumed. Power management is currently one of the most critical enabling technologies to further increase VLSI performance and integration density. Dynamically scaling of the power supply voltage and clock frequency according to performance needs has been investigated for more than 10 years. Most of the previous work focused only on saving power at the VLSI chip level. The design of the power efficient variable output power supplies (DC-DC Converters) is often assumed to be trivial and as an afterthought. While significant power saving has been reported at the VLSI chip level, the overall power saving at the system level is often worse than expected.