VLSI power management technology

现代VLSI芯片在最高性能情况下的功耗可能会导致过热，甚至会造成破坏性的影响。这在便携式多媒体和电信产品中尤其关键，这些产品的外形、冷却和电池寿命都有非常严格的限制。此外，由于固有的CMOS泄漏电流，也消耗了大量不需要的待机功率。电源管理是当前进一步提高VLSI性能和集成密度的最关键的使能技术之一。根据性能需要动态调整电源电压和时钟频率已经研究了10多年。以前的工作大多集中在VLSI芯片级的功耗节省上。高能效的可变输出电源(DC-DC转换器)的设计通常被认为是琐碎的，是事后才想到的。虽然VLSI芯片级的节能效果显著，但系统级的整体节能效果往往比预期的要差。

The power consumed by modern VLSI chips under maximum performance situation could cause over-heat and even become destructive. This is especially critical in portable multimedia and telecommunication products where form factor, cooling and battery life impose very stringent limitations. In addition, a substantial amount of unwanted standby power due to the inherent CMOS leakage current is also consumed. Power management is currently one of the most critical enabling technologies to further increase VLSI performance and integration density. Dynamically scaling of the power supply voltage and clock frequency according to performance needs has been investigated for more than 10 years. Most of the previous work focused only on saving power at the VLSI chip level. The design of the power efficient variable output power supplies (DC-DC Converters) is often assumed to be trivial and as an afterthought. While significant power saving has been reported at the VLSI chip level, the overall power saving at the system level is often worse than expected.