Simulation of in-circuit operation of OTP memory devices

一次可编程(OTP)存储器可以在各种应用中找到，从模拟 微调、校准代码、ID标签和处理器配置等。Sidense的OTP存储设备基于 关于涉及对存储单元的永久结构改变的反熔丝编程。当位单元被 在编程电压的作用下，晶体管沟道上的薄栅氧化物局部熔化 再结晶成纳米硅晶体，形成导电通道。由于不可逆转的物理变化 在编程过程中，不能使用传统方法模拟写入电路的操作。Sidense有一个 迫切需要开发一种模拟方法，以促进可靠、功率和面积高效的设计 用于其OTP设备的读/写电路。重要的是要对在线氧化物击穿的影响进行建模 重结晶，以确保其OTP设备的正确编程。本项目拟发展 一种考虑了实时物理变化的新型工艺/器件/电路仿真方法 在编程期间发送到OTP设备。研究方法包括开发一种自动化的 使用Croslight的CSUPREM和Apsys TCAD工具进行自迭代混合模式工艺/器件模拟。 将不同编程条件下的仿真结果与实验数据进行对比和标定 由Sidense提供。这项工作将促进位单元编程算法的优化和 推导了一种适用于电路仿真的紧凑型OTP器件模型。使用不同的建模方法 简单查找表(LUT)、经验分段线性方程或具有用户可控电流的子电路 和/或电压源也将被检查。建议的工艺/器件/电路仿真方法是 新的设计技术。这对于进一步推动OTP技术的商业化是至关重要的。

One Time Programmable (OTP) memories can be found in a variety of applications, ranging from analog trimming, calibration code, ID tags, and processor configuration, etc. Sidense's OTP memory device is based on anti-fuse programming that involves a permanent structural change to the memory cell. When a bit cell is subjected to a programming voltage, the thin gate oxide over the transistor channel melts locally and recrystallizes into silicon nano-crystal, forming a conductive channel. Due to the irreversible physical changes during programming, the write circuit operation cannot be simulated using traditional approach. Sidense has an urgent need to develop a simulation approach to facilitate the design of reliable, power and area efficient read/write circuits for their OTP devices. It is important to model the effect of in-circuit oxide breakdown and recrystallization to ensure the proper programing of their OTP devices. This project proposes the development of a novel process/device/circuit simulation methodology that takes into account the real-time physical changes to the OTP devices during programming. The research methodology involves the development of an automated self-iterating mixed mode process/device simulation using Crosslight's CSUPREM and APSYS TCAD tools. The simulation under different programming conditions will be compared and calibrated to experimental data provided by Sidense. This work will facilitate the optimization of the bit-cell programming algorithms and the derivation of a compact OTP device model suitable for circuit simulation. Different modeling approaches using simple look up tables (LUTs), empirical piecewise linear equations, or sub-circuits with user controlled current and/or voltage sources will also be examined. The proposed process/device/circuit simulation methodology is a new design technique. This is essential to furthering the commercialization of OTP technology.