Hierarchical Test Generation and Design For Testability of Core-Based Systems

本文研究了基于核心系统的可测试性技术的分层和符号化测试生成与设计。该系统可以是软核、硬核和硬核的组合。在不可测试软核的情况下，分层可测试性技术被应用于使它们可测试。此外，正在开发增加硬件的技术，使核心在功能上透明，并且可以在不丢失信息的情况下传播测试数据。该方法是将可测试核和透明核相结合，以确保预先计算的测试序列的正确性。这种测试生成方法与内核的位宽度无关。核心供应商也在探索具有可测试性特性的硬核和硬核。这里的方法包括：使用核心供应商提供的信息；使用内置的可测试性功能；通过核心之外的胶水逻辑提供透明性。

This research is on hierarchical and symbolic test generation and design for testability techniques for core- based systems. The system can be a combination of soft, firm and hard cores. In the case of untestable soft cores, hierarchical testability techniques are being applied to make them testable. Also techniques of adding hardware so the cores are functionally transparent and can propagate test data without information loss are being developed. The approach is to integrate testable and transparent cores to ensure justification of precomputed test sequences. This test generation approach is independent of the bit-width of the cores. The case of firm and hard cores which have testability features built into them by core providers is also being explored. Approaches here include: using information supplied by the core vendor; use of in-built testability features; and providing transparency through glue logic outside the core.