Low Temperature Embedded Memory Devices for Near-Memory and In-Memory Computing

数据中心的高性能计算使众多商业和关键军事应用成为可能，包括基因组测序、计算化学、金融风险建模、天气预报、复杂系统设计、多域物理模拟、密码分析和深度学习等。从历史上看，高性能计算的改进是由遵循摩尔定律的新型集成电路技术驱动的。在过去的十年中，这种模式不再带来重大的进步，因为继续传统晶体管缩放的困难，特别是在降低功率方面。虽然逻辑电路通常设计为在室温下工作，但众所周知，晶体管的特性可以在较低的温度下显着改善。如果低温计算在77开尔文（液氮温度）下取得成功，那么数据中心节省的能源可能会超过冷却电力成本，从而减少社会的碳足迹。大多数先前的研究都集中在低温逻辑晶体管（包括高速缓存存储器）和计算密集型微处理器设计上。相反，低温存储设备和采用近内存和内存计算范式的数据密集型加速器设计很少被探索。该奖项还将培养下一代学生，使其成为改造美国国内半导体和微电子技术的劳动力。该合同将对内部制造的嵌入式存储器件进行全面表征，并与代工合作伙伴一起进行测试。这里感兴趣的嵌入式存储器器件包括电阻随机存取存储器（RRAM）和铁电场效应晶体管（FeFET），它们为读密集型权重存储器提供多电平状态，以及用于写密集型缓冲存储器的基于2晶体管增益单元的嵌入式动态随机存取存储器（eDRAM）。该项目的目标是技术寻径，以便在77 K下与室温相比，为数据密集型工作负载（例如机器/深度学习）实现10倍的节能和3倍的性能提升（在吞吐量或延迟方面）。该奖项的成果不仅包括低温下嵌入式存储器的第一手实验数据，还包括低温下近内存和内存计算加速器设计技术协同优化的基准框架。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

High performance computing in data centers enables numerous commercial and critical military applications, including genomic sequencing, computational chemistry, financial risk modeling, weather prediction, complex system design, multi-domain physical simulations, crypto-analysis, and deep learning, etc. Historically, improvements in high-performance computing have been driven by new integrated-circuit technology scaling following Moore’s law. That paradigm is no longer bringing significant advances in the last decade due to the difficulty in continuing conventional transistor scaling, particularly with respect to power reduction. While logic circuitry is typically designed to operate at room temperature, it is well known that transistor characteristics can improve significantly at lower temperatures. If cryogenic computing is successful at 77 Kelvin (the liquid-nitrogen temperature), the energy savings for data centers could potentially overwhelm the cooling power cost, resulting in the reduction of carbon footprint for society. Most prior research have been focused on low-temperature logic transistors (including cache memory) and compute-intensive microprocessor design. On the contrary, low-temperature memory devices and data-intensive accelerator design that employs near-memory and in-memory compute paradigms are much less explored. This award will also train the next generation of students as the workforce for revamping the US domestic semiconductors and microelectronics. This award will undertake a comprehensive characterization of embedded-memory devices fabricated in-house and test vehicles with collaborative foundry partners. The embedded-memory devices of interests here include resistive random-access memory (RRAM) and ferroelectric field-effect transistors (FeFET) that offer multilevel states for the read-intensive weight memories, and 2-transistor gain-cell-based embedded dynamic random access memory (eDRAM) for write-intensive buffer memories. The goal of this project is technology pathfinding to enable 10× energy saving and 3× performance improvement (in terms of throughput or latency) for data-intensive workloads (e.g., machine/deep learning) at 77 K when compared to room temperature. The outcome of this award includes not only a collection of first-hand experimental data of embedded memories at cryogenic temperatures but also a benchmark framework for design-technology co-optimization of near-memory and in-memory compute accelerators at cryogenic temperatures.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.