Development of nanofabrication technology of metallic p-GaAs and its application to single hole transistors

本研究采用原子力显微镜表面氧化工艺对p型GaAs进行表面改性，制备平面型器件。用三甲基镓（Ga(CH_3)_3: TMG）和单质As组成的金属有机分子束外延（MOMBE）制备了重碳掺杂p^<++>-GaAs，并使用市售AFM装置在室温下在空气中局部氧化了zn掺杂p-GaAs衬底。原子力显微镜尖端为镀金的Si_3N_4，呈锥体状，基底尺度为4μm。脉冲电压源采用函数发生器，恒压源采用半导体参数分析仪。所有实验均采用接触式原子力显微镜进行。利用扫描电镜（SEM）观察电子束诱导沉积a- c改善原子力显微镜针尖的形状，并调整原子力显微镜氧化工艺条件，成功制备了宽度为10nm的p^<++>-GaAs氧化丝。由此可见，可以通过调整工艺条件来控制p^<++>-GaAs氧化丝的尺寸。此外，为了提高p-GaAs氧化物的纵横比，采用了一种基于afm的表面氧化工艺，包括电压调制。从氧化点宽高比的占空比依赖性来看，认为每脉冲电压一个周期的阳极氧化时间的优化是必要的。在60nm/s的扫描速度下，制备了宽度为40nm，深度为6nm的p-GaAs沟槽。从这些结果可以清楚地看出，脉冲电压可以用于制造具有高纵横比的氧化物。最后，将该氧化线作为绝缘体成功应用于SIS（半导体-绝缘体-半导体）二极管。从氧化线的非线性I-V特性出发，发现氧化线对电流起着绝缘阻挡材料的作用。

In this study, AFM-based surface oxidation process was applied for the surface modification of p-type GaAs to fabricate planar-type devices.A heavily carbon doped p^<++>-GaAs fabricated by metalorganic molecular beam epitaxy (MOMBE) with trimethylgallium (Ga(CH_3)_3 : TMG) and elemental As and a Zn-doped p-GaAs substrate were locally oxidized in air at room temperature using a commercially available AFM unit. The tip of the AFM was Au-coated Si_3N_4 with a pyramidal shape with a base scale of 4μm. A function generator was used for the source of pulsed voltage, and a semiconductor parameter analyzer was also used for the source of constant voltage. All experiments were done by contact mode AFM.By improving the shape of an AFM tip by electron-beam-induced deposition of a-C using scanning electron microscope (SEM), and by adjusting the AFM oxidation process conditions, a p^<++>-GaAs oxide wire with 10nm width was successfully fabricated. From this result, it was clear that the sizes of p^<++>-GaAs oxide wires could be controlled by adjusting the process conditions.Moreover, an AFM-based surface oxidation process, including a voltage modulation, was employed in order to improve aspect ratios of p-GaAs oxide. From a duty ratio dependence of aspect ratios of oxide dots, it was considered that optimization of an anodizing time per a cycle of a pulsed voltage was necessary. As a result, we fabricated a p-GaAs groove with 40nm width and 6nm depth at a scanning speed of 60nm/s. From these results, it became clear that pulsed voltage could be employed for the fabrication of oxide with high aspect ratio.Finally, the obtained oxide wire was successfully applied to semiconductor-insulator-semiconductor (SIS) diode as insulator. From its nonlinear I-V characteristic, it was found that the oxide wire acts as the insulating barrier material for the current.