Experimental characterization and compact modeling of high-field effects in CNTFET channels

与传统的块状半导体相比，半导体单壁碳纳米管（CNT）具有许多有利的性质。最新的实验结果120纳米碳纳米管场效应晶体管（FET）在我们的实验室获得的非本征截止频率在40 GHz的范围内。这接近130 nm CMOS典型的70 GHz截止频率，尽管每微米沟道宽度只有40个CNT，每个管的漏电流只有大约4微安。这两个值都远低于理论上可实现的密度600碳纳米管/微米和已经测量的漏电流20…为了设计基于多管多指CNTF的有竞争力的高频（HF）电路，需要知道实际“可用”的工作范围。迄今为止进行的研究主要集中在金属CNT和CNT在真空中或暴露于空气中的热击穿（和破坏）。不幸的是，这样的研究不适用于实际有用的平面FET结构，其中CNT总是嵌入在至少一个氧化物层内。因此，本研究主要针对：（1）不同通道形成方法下，平面碳纳米管薄膜的晶圆级制程特性研究（ii）栅极氧化物和隔离材料，以及（iii）接触材料和栅极布置;（2）对各种物理击穿机制的调查和详细了解（雪崩，隧穿，热）和它们在电子电路中的晶体管操作过程中的相互作用;（3）一个数值稳定的紧凑模型的发展，调查的影响CNTFET击穿的HF电路的性能。

Compared to conventional bulk semiconductors, semiconducting single-walled carbon nanotubes (CNTs) possess a number of advantageous properties. The latest experimental results of 120 nm CNT field-effect transistors (FETs) obtained in our lab yielded extrinsic cut-off frequencies in the range of 40 GHz. This is approaching the 70 GHz cut-off frequency typical for 130 nm CMOS, despite the just 40 CNTs per micrometer channel width and a drain current of just about 4 microampere per tube. Both values are far below the theoretically achievable density of 600 CNTs/micrometer and already measured drain currents of 20...70 microampere/CNT.For designing competitive high-frequency (HF) circuits based on multi-tube multi-finger CNTFETs, the actually "useable" operating range needs to be known. Studies performed so far have mostly focused on thermal breakdown (and destruction) of metallic CNTs and of CNTs in vacuum or exposed to air. Unfortunately, such studies are not applicable to practically useful planar FET structures, where the CNTs are always embedded within at least one oxide layer. Therefore, this proposal mainly addresses: (1) the experimental characterization of at wafer-scale fabricated planar CNTFETs using different (i) channel formation methods (CVD, dispersion), (ii) gate oxide and isolation materials, and (iii) contact materials and gate arrangements; (2) the investigation and detailed understanding of the various physical breakdown mechanisms (avalanche, tunneling, thermal) and their interplay during transistor operation in electronic circuits; (3) the development of a numerically stable compact model for investigating the impact of CNTFET breakdown on the performance of HF circuits.