Statistical modeling method for scaled MOSFET
Statistical modeling method for scaled MOSFET
批准号:
08555085
负责人:
ONODERA Hidetoshi
金额:
$4.8万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (A)
财政年份:
1996
资助国家:
日本
项目状态:
已结题
起止时间:
1996 至 1997
中文摘要
(a)使用中间模型的统计MOSFET建模MOSFET需要根据lsi设计过程中的需要在不同的细节级别上建模。我们开发了一种统计建模方法,可以系统地通用于各种模型。模型的适应性是通过引入一个中间统计模型来实现的,该模型具有许多模型所共有的基本结构。提出了用中间模型描述统计特征的方法和将中间模型转化为目标模型的方法。利用BSIM3v3模型对0.3 μ m mosfet进行统计建模,验证了该方法的有效性。(b)具有布局信息的CMOS电路匹配分析,研究了用于匹配分析的mosfet统计建模。在建模中考虑了栅极多晶硅的微加载效应对最终栅极长度的影响。开发了TEG结构,用于提取匹配属性的模型参数。(c)开发以命令语言进行统计分析的计算机辅助设计为了利用本计划所开发的统计建模方法,我们开发了一个计算机辅助设计框架,使设计人员可以使用命令语言定义自己的统计分析程序。
英文摘要
(a)Statistical MOSFET modeling using an intermediate modelMOSFETs need to be modeled in a various levels of details according to the needs in a design process of LSIs. We have developed a statistical modeling method which can be applied commonly to various models in a systematic way. The model adaptability is a schieved by the introduction of an intermediate statistical model which has a basic structure common to many models. The method for describing statistical characteristics by the intermediate model and the method for transforming intermediate model to target models are developed. The effectiveness of the method is verified experimentally by statistical modeling of 0.3mum MOSFETs using the BSIM3v3 model.(b)Matching analysis of CMOS Circuits with layout informationstatistical modeling of MOSFETs for matching analysis has been studied. Micro-loading effect of gate poly-silicon which affects final gate-length has been incorporated in the modeling. TEG structures are developed for the extraction of model parameters for the matching properties.(c)Development of CAD for statistical analysis with a command languageIn order to utilize the statistical modeling method developed in this project, we have developed a CAD framework which enables a designer to define his own procedure for statistical analysis using a command language.
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M.Kondo, H.Onodera, and K.Tamaru: ""A Curremt Mode Cyclic A/D Converter with Submicron Processes"" IEICE Trans.Fundamentals. Vol.E80-A. 360-364 (1997)
M.Kondo、H.Onodera 和 K.Tamaru:“采用亚微米工艺的电流模式循环 A/D 转换器””IEICE Trans.Fundamentals。
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H.Onodera: "P2Lib : Process-Portable Library and Its Generation System" Proc.IEEE 1997 CICC. 341-344 (1997)
H.Onodera:“P2Lib:过程可移植库及其生成系统”Proc.IEEE 1997 CICC。
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岡田健一: "レイアウトを考慮したCMOS回路の比精度解析" 第11回回路とシステム軽井沢ワークショップ論文集掲載予定. (1998)
Kenichi Okada:“考虑布局的 CMOS 电路的比率精度分析” 预定发表于第 11 届电路与系统轻井泽研讨会论文集(1998 年)。
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M.Kondo: "A Curremt Mode Cyclic A/D Converter with Submicron Processes" IEICE Trans.Fundamentals. E80-A. 360-364 (1997)
M.Kondo:“采用亚微米工艺的电流模式循环 A/D 转换器”IEICE Trans.Fundamentals。
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岡田 健一: "レイアウトを考慮したCMOS回路の比精度解析" 第11回回路とシステム軽井沢ワークショップ論文集. (掲載予定). (1998)
Kenichi Okada:“考虑布局的 CMOS 电路的比率精度分析”第 11 届电路与系统轻井泽研讨会论文集(待出版)。
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共 7 条
LSI design methodology that enables robust operation under the supply as low as threshold voltage by self-compensating performance variability
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批准号:25280014
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$11.65万
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财政年份:2013
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负责人:ONODERA Hidetoshi
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依托单位:
Integrated Circuit Design for Robust Operation under Low Supply Voltage
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批准号:22300016
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$11.81万
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财政年份:2010
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负责人:ONODERA Hidetoshi
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依托单位:
Variation and Defect Aware Design of Integrated Circuits
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批准号:19300010
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$12.23万
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财政年份:2007
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负责人:ONODERA Hidetoshi
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依托单位:
Research of a High-speed Signal Transmission Scheme for Integrated Circuits
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批准号:14350186
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$10.88万
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财政年份:2002
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负责人:ONODERA Hidetoshi
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依托单位:
Development of Statistical Performance Analysis and Optimization Methods for Large Scale Integrated Circuits
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批准号:11555095
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$7.42万
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财政年份:1999
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负责人:ONODERA Hidetoshi
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依托单位:
Development of a Functional LSI Achieving Low-rate Multimedia Data Transmission.
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批准号:10450136
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项目类别:Grant-in-Aid for Scientific Research (B).
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资助金额:$6.98万
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财政年份:1998
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负责人:ONODERA Hidetoshi
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依托单位:
Optimization of detailed design for UDSM (ultra deep submicron) integrated circuits
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批准号:09650383
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项目类别:Grant-in-Aid for Scientific Research (C)
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资助金额:$2.43万
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财政年份:1997
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负责人:ONODERA Hidetoshi
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依托单位:
Development of Comprehensive Set of LSI CAD Benchmarks
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批准号:06558041
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项目类别:Grant-in-Aid for Developmental Scientific Research (B)
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资助金额:$4.61万
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财政年份:1994
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负责人:ONODERA Hidetoshi
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依托单位:
Simultaneous Circuit and Layout Design Method for Analog LSIs under Performance Constraints
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批准号:06680317
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项目类别:Grant-in-Aid for General Scientific Research (C)
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资助金额:$1.41万
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财政年份:1994
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负责人:ONODERA Hidetoshi
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依托单位:
海外基金