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CAREER: STT-RAM based Memory Hierarchy and Management in Embedded Systems

职业：嵌入式系统中基于 STT-RAM 的内存层次结构和管理

基本信息

批准号：
1149654
负责人：
Hai Li
金额：
$ 45万
依托单位：
Polytechnic University of New York
依托单位国家：
美国
项目类别：
Continuing Grant
财政年份：
2012
资助国家：
美国
起止时间：
2012-09-01 至 2013-01-31
项目状态：
已结题

来源：
https://www.nsf.gov/awardsearch/showAward?AWD_ID=1149654&HistoricalAwards=false
关键词：
CAREER STT RAM based Memory

项目摘要

The objective of the research is to develop an innovative spin-transfer torque random access memory (STT-RAM) based memory hierarchy to meet the demands of modern embedded systems for low-power, fast-speed and high-density on-chip data storage. Three integrated components are included in our research to address the major technical concerns in STT-RAM designs: (1) Application-driven STT-RAM cell design and optimization to target different embedded system specifications. (2) Thermal resilient adaptive STT-RAM memory hierarchy to tolerate the temperature instability of STT-RAM incurred by ambient temperature and self-heating. (3) Probabilistic STT-RAM design methodology to improve the run-time stability and/or the performance. This research provides a comprehensive design package for efficiently integrating STT-RAM into modern embedded system designs and offers unparalleled performance and power advantages. The system architects and the circuit designers can be well bridged and educated by the research innovations. The developed techniques can be directly transferred to industry applications under the close collaborations with several industry partners, and directly impact the future embedded systems. The activities in the collaboration also include the tutorials in the major conferences on the technical aspects of the projects and new course development. The educational components of this project will introduce the students to the implementation and optimization techniques of embedded systems and train the students? problem solving ability by leveraging challenge based instruction technique.

研究的目的是开发一种创新的自旋转移矩随机存取存储器（STT-RAM）的存储器层次结构，以满足现代嵌入式系统的低功耗，快速和高密度的片上数据存储的需求。我们的研究主要包括三个方面：（1）应用驱动的STT-RAM单元设计和优化，以适应不同的嵌入式系统规格。(2)热弹性自适应STT-RAM存储器层次结构，以容忍由环境温度和自加热引起的STT-RAM的温度不稳定性。(3)可能的STT-RAM设计方法，以提高运行时的稳定性和/或性能。这项研究提供了一个全面的设计包，有效地集成STT-RAM到现代嵌入式系统设计，并提供无与伦比的性能和功耗优势。研究创新可以很好地沟通系统架构师和电路设计师，并对他们进行教育。在与多个行业合作伙伴的密切合作下，开发的技术可以直接转移到行业应用中，并直接影响未来的嵌入式系统。合作的活动还包括在主要会议上就项目的技术方面和新课程开发提供辅导。该项目的教育部分将向学生介绍嵌入式系统的实现和优化技术并培训学生？利用基于挑战的教学技术解决问题。