SHF: Small: VLSI Circuit Simulation Using Parallel Processing

这项研究的目的是分析和验证VLSI系统，并展示极大地改进的可扩展性，以提高预测电路建模的质量和范围。由于先进制造技术的互连优势，VLSI电路模拟变得至关重要。功能模块通过基板集成，并通过导线与寄生电路连接。对整个系统的模拟将使设计者能够充分掌握电路的暂态行为。该方案的智能优点在于全芯片仿真的算法和软件包。电路仿真是工业超大规模集成电路设计的主要瓶颈之一。全芯片模拟芯片的复杂性对于最先进的设计来说是令人望而却步的。该项目可以显著改善整个电路模拟的周转时间和能力，使VLSI行业在技术颠覆时期更具竞争力，从而使设计快速演变。研究开发的运行时软件技术应该适用于模拟器之外的广泛应用程序，这些应用程序可以受益于延迟容忍公式。采用硬件加速的新平台，如图形处理器，也将受益，因为它们重视通信。更广泛的影响包括以下教育和推广部分。(1)研究将与电子设计自动化公司和设计公司合作进行，研究结果将直接转移到3D IC设计行业。(2)举办研讨会和新课程，培养本科生和研究生。将在加州大学圣迭戈分校和工业合作伙伴现场开发和教授一门关于使用并行处理进行电路模拟的新研究生级课程。(3)高级技术书籍和课堂讲义将通过出版商和网站发布。对于更广泛的教育推广，将举办网络研讨会。(4)研究团队高度整合，由加州大学圣地亚哥分校和劳伦斯伯克利国家研究实验室的两名研究人员和一名来自不同背景的高级研究员组成。参与该项目的研究生的教育将通过参与跨学科合作研究而得到加强。为了传播我们对这里概述的想法的兴奋，并激发未来科学家的科学想象力，该团队将为少数族裔和弱势学生进行示范和讲座。

The objective of this research is to analyze and verify VLSI systems and to demonstrate vastly improved scalability in order to raise the quality and scope of predictive circuit modeling. VLSI circuit simulation has become critical due to interconnect dominance of advanced fabrication technologies. Functional modules are integrated through substrates and connected by wires with parasitics. A simulation of the whole system will empower designers with a full grasp of the transient behavior of the circuits. The intellectual merit of this proposal lies in the algorithm and software package for full chip simulation. Circuit simulation is one of the main bottlenecks in VLSI design in industry. The complexity of full chip simulations chip is prohibitive for state-of-the-art designs. The project could significantly improve the turnaround time and capacity of whole circuit simulations, enabling the VLSI industry to be more competitive during a time of technological disruption and hence rapid design evolution. The run time software techniques developed by the investigation should apply to a wide range of applications beyond the simulator that could benefit from latency tolerant formulation. New platforms that employ hardware acceleration, e.g. GPUs, will also benefit, since they place a premium on communication.The broader impacts include the following educational and outreach components. (1) The research will be conducted in collaboration with electronic design automation companies and design houses and the findings will be directly transferred to industry for 3D IC designs. (2) Seminars and new courses will be offered to educate undergraduate and graduate students. A new graduate-level course on circuit simulation using parallel processing will be developed and taught at UCSD as well as at industrial partner sites. (3) Advanced technology books and class handouts will be released through publishers and web-sites. For wider educational outreach, webinars will be presented. (4) The research team is highly integrated and consists of two investigators and a senior researcher from different backgrounds at UCSD and Lawrence Berkeley National Research Laboratory. Education of graduate students involved in the project will be enhanced by participation in an interdisciplinary collaborative research. To disseminate our excitement with the ideas outlined here, and to stimulate the scientific imagination of future scientists, the team will give demonstrations and lectures for minority and disadvantaged students.