NSF/ENG/ECCS-BSF: Dynamically configurable memory technology based on ferroelectric-gated field effect transistors

这个NSF/ENG/ECCS-BSF提案的主要目标是展示一种基于铁电门控FET（FeFET）的新型动态可配置存储器技术的可行性和可扩展性。具体地，“动态可配置性”使得制造的存储器阵列能够通过调整写入/擦除编程强度来表现为非易失性存储器（NVM，具有10年保持时间和105-106个耐久周期）或DRAM（具有1012个耐久周期但保持1小时）。这种前所未有的能力是传统半导体存储器的范式转变，其中NVM和DRAM是两种完全不同的技术，并且具有严格的边界来将它们分开。通过拟议的研究项目成功突破这些严格的界限，将为器件工程师、电路设计师和系统集成商提供无数机会，继续推动NVM和DRAM技术传统缩放方法的前沿。PI和Co-PI外展活动包括从邻近的南康涅狄格州立大学招募本科生和K-8教师，该大学有25%以上的少数民族入学率，并培训K-8教师，以参与拟议的研究项目。所提出的动态可配置的存储器技术代表了从非易失性存储器（NVM）对抗DRAM的传统概念的范式转变，其中这两种存储器技术被认为是根本不同的，不仅在基本存储器单元结构中，而且在阵列架构和操作原理中。为了实现这一目标，耶鲁大学的PI/Co-PI与以色列理工学院的研究团队合作，将利用互补优势，解决与器件物理、器件工程、器件制造、建模/仿真、电路设计、器件/电路表征和材料科学相关的基础和技术问题，以实现研究目标。这项研究的成功演示将有助于突破所有这些界限，因为相同的制造硬件将仅通过控制编程软件来服务于系统中NVM和DRAM的功能。对于半导体存储器社区来说，这将为创新研究开辟新的机会，超越传统的方法论，这种方法论被划分的NVM和DRAM之间的传统界限所限制。

The main objective of this NSF/ENG/ECCS-BSF proposal is to demonstrate the feasibility and scalability of a novel dynamically configurable memory technology based on ferroelectric-gated FET's (FeFET's). Specifically, the 'dynamical configurability' enables the fabricated memory array to behave as either nonvolatile memory (NVM, with 10 years retention time and 105-106 endurance cycles) or as DRAM (with 1012 endurance cycles but 1 hour retention) by adjusting the write/erase programming strength. This unprecedented capability is a paradigm shift from the conventional semiconductor memory in which the NVM and DRAM are two entirely different technologies and have rigid boundaries to separate them. The successful breakthrough of these rigid boundaries through proposed research project will open up numerous opportunities for device engineers, circuit designers, and systems integrators to continue to push the frontiers of the conventional scaling approach of both NVM and DRAM technologies. The PI and Co-PI outreach activities involves recruitment of undergraduates and K-8 teachers from neighboring Southern Connecticut State University which has 25+% underrepresented minority enrollment and trains K-8 teachers, for participation in the proposed research project. The proposed dynamically configurable memory technology represents a paradigm shift from the conventional concept of pitting nonvolatile memory (NVM) against DRAM, where the two memory technologies are considered to be fundamentally different, not only in the basic memory cell structure but also in the array architecture, and operating principles. To achieve this objective, the PI/Co-PI at Yale University in collaboration with the research team at the Technion-Israel Institute of Technology will take advantage of complementary strengths in addressing fundamental as well as technological issues related to device physics, device engineering, device fabrication, modeling/simulation, circuit design, device/circuit characterization, and materials science, to achieve the research objective. The successful demonstration of this proposed research will serve to break through all these boundaries, as the same fabricated hardware will serve the functionality of both NVM and DRAM in a system by merely controlling the programming software. For the semiconductor memory community, this will open up new opportunities for innovative research that goes beyond the conventional methodology that is confined by the traditional boundaries between the compartmentalized NVM and DRAM.