Study on Nanometer SOI Device Structure

SOI上SiGe埋沟MOSTFT的有效空穴迁移率与SiGe沟道结构和晶体质量有关。本工作采用低压化学气相沉积技术，在550℃的SIMOX衬底上形成了由单量子阱和三量子阱组成的两种埋沟结构。生长装置是在超清洁技术的基础上建造的。该合金的Ge组分为0.2。量子阱的SiGe势垒宽度LZ为13 nm，TQW的LZ为3 nm。TQW的硅势垒厚度Lb分别为2 nm和8 nm。在该衬底上制作了5.9 nm栅氧化层的MOSFET。在室温下，得到了这两种器件的有效空穴迁移率μff与有效电场eEff的关系。与SQW器件相比，TQW器件的迁移率提高了近60%。迁移率的提高可能是由于具有高空穴迁移率的SiGe量子阱中捕获的空穴数量增加所致。在40 nm厚的SOI上制备了3 nm的SiGe势垒宽度和2 nm的Si势垒厚度的三量子阱沟道器件获得了最好的有效空穴迁移率。结果表明，SOI上的多量子阱沟道pMOSFET提高了有效空穴迁移率，改善了器件性能。

The effective hole mobility of SiGe buried-channel MOSTFT on SOI depends on the SiGe channel structure as well as the crystalline quality. In this work, the two sorts of buried-channel structure that consisted of single quantum well (SQW) and triple quantum wells (TQW) were formed at 550℃ on SIMOX wafers by low-pressure CVD. The growth apparatus was built on the basis of ultra-clean technology. The Ge composition of the alloy was 0.2. The SiGe well width, Lz, was 13 nm for SQW and fixed at 3 nm for TQW. The Si barrier thickness, LB, was 2 and 8 nm for TQW. The MOSFETs with the 5.9 nm gate oxide were fabricated on the layers. The Effective hole mobility, μeff, versus effective electric field, Eeff, for the both device types were obtained at room temperature. The mobility of TQW devices was enhanced nearly by 60 %, compared with that for the SQW devices. The mobility enhancement might be due to the increase of the number of holes trapped in the SiGe quantum wells that had the high hole mobility. The best effective hole mobility was obtained for the triple quantum wells channel device with the 3-nm SiGe well width and 2-nm Si barrier thickness fabricated on 40-nm-thick SOI. It was concluded that the multiple quantum wells channel pMOSFETs on SOI enhanced the effective hole mobility and promoted the device performance.