Time-Dependent Variability: A test-proven modelling approach for systems verification and power consumption minimization

根据摩尔定律，半导体行业在过去50年里通过积极缩小晶体管的规模，不断提高系统的功能和速度。在过去的20年里，英国基于IC设计的行业已经发展到了国内和国际的重要水平。尽管IC设计师过去享有芯片中所有晶体管都可以被同等对待的自由，但现在和未来技术中使用的纳米级晶体管已经不再是这样了。器件间的统计变化是由电荷的离散性和物质的粒度引入的，并且与栅极面积成反比，因此它对电路的影响随着晶体管尺寸的减小而增加。当系统中的逻辑门数量增加，体系结构变得更加复杂时，对变化的容忍度会大大降低。即使两个器件在制造后是相同的，它们在操作过程中也可能遭受不同的老化，导致时间相关变异性(TDV)。TDV正成为电子系统正确性的主要威胁，但由于缺乏完整的理解，目前还没有工具来验证它。该项目的目的是深入调查TDV的缺陷和产生机制，并在此基础上开发一个经过测试验证的TDV模拟器，使IC设计者能够评估TDV对其电路的影响。格拉斯哥大学的研究人员开创了变异性模拟的先河，利物浦约翰摩尔大学的研究人员专门从事缺陷的实验表征。他们的技能高度互补，使他们走到了一起，使他们处于有利地位，可以应对这一挑战。通过与英国公司合作，他们的工作对英国工业的影响将是直接的。与IMEC及其工业联盟的合作也开辟了一条在国际范围内产生影响的有效途径。TDV的成功控制将提供可靠的电子产品，并将其功耗降至最低。

Following the Moore's law the semiconductor industry has delivered continuous increase of systems functionality and speed over the last 50 years through the aggressive downscaling of the transistors. In the last 20 years the UK IC-design based industry has grown to a level of national and international importance. While IC designers in the past enjoyed the freedom that all transistors in a chip could be treated identically, this is no longer the case for the nano-meter sized transistors used in the present and future technologies. Statistical device-to-device variation is introduced by the discreteness of charge and granularity of matter and is inversely proportional to gate area, so that its impact on circuits increases with the reduction of transistor dimensions. When the number of logic gates in a system increases and the architecture becomes more complex, the tolerance to variability is greatly reduced. Even if two devices were identical after fabrication, they could suffer from different aging during operation, causing a time-dependent variability (TDV). TDV is becoming a major threat to the correctness of electronic systems, but there are no tools for its verification because of the lack of a complete understanding. The aim of this project is to carry out an in-depth investigation of the defects and mechanisms responsible for TDV and, based on that, to develop a test-proven TDV simulator, allowing IC designers to assess the impact of TDV on their circuits. The researchers at Glasgow University have pioneered variability simulation and the researchers at Liverpool John Moores University have specialised in experimental characterization of defects. Their highly complementary skills bring them together and make them well positioned to tackle this challenge. By working together with UK companies, the impact of their work on UK industry will be direct. The collaboration with IMEC and its industrial consortium also opens an effective impact pathway on an international scale. The successful control of TDV will deliver reliable electronic products and minimize their power consumption.