CPA-DA: Design Techniques and Tools to Enable and Enhance Coarse-Grain Power Gating in ASIC Designs
CPA-DA: Design Techniques and Tools to Enable and Enhance Coarse-Grain Power Gating in ASIC Designs
批准号:
0811876
负责人:
Massoud Pedram
金额:
$0.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2008
资助国家:
美国
项目状态:
已结题
起止时间:
2008-08-01 至 2011-07-31
中文摘要
主要研究者:Pedram,Massoud提案编号:0811876职务:CPA-DA:在ASIC设计中启用和增强粗粒度功率门控的设计技术和工具机构:南加州大学该项目侧重于ASIC设计中的粗粒度功率门控,它可以切换整个标准单元块/行。这种选择是由于与细粒度功率门控相比,粗粒度功率门控的成本更低,泄漏节省更多,细粒度功率门控在ASIC设计库的每个标准单元中插入页眉或页脚。预计项目结果将包括以下内容:(i)分布式休眠晶体管布局和尺寸;(ii)休眠信号调度,以最大限度地减少唤醒时的峰值电流需求;(iii)模式转换能量最小化,以实现更频繁的模式转换;(iv)用于自主电源门控的本地休眠信号生成;以及(v)电源门控,以实现多种电源模式。该提案旨在通过开发算法或数学编程解决方案来解决每个步骤,并通过开发设计流程和原型软件工具来解决这些任务中的每一个,这些工具可以在ASIC设计中广泛采用这种非常有趣和重要的技术。半导体行业?中国2006年2610 B美元的收入并不能准确反映其在使470亿美元(按购买力平价计算为610亿美元)的世界经济繁荣和增长中所起的关键作用。 该行业支撑着世界人民和政府为未来繁荣所依赖的系统和技术。该行业目前正面临着一些非凡的挑战,包括纳米器件的可变性以及电路和系统中的过度功耗。为了使该行业继续扩大和繁荣,必须正面应对这些挑战。拟议的研究将应对这两个基本挑战之一,即,的?权力危机?拟议研究的决定性影响将是使CMOS规模在未来10-15年内继续保持不变。此外,该项目将积极吸引研究生和本科生的参与。对于研究生来说,积极参与研究工作将增强他们的创造性和多学科思维,并为未来的独立工作做好准备。私家侦探?大学承诺让本科生参与精心设计的项目,将有助于培养他们对科学研究活动的长期热情。将研究纳入课程开发和课堂教学将为传播研究成果提供一个强有力的场所,大大补充了传统的会议和档案期刊场所。
英文摘要
PI: Pedram, MassoudProposal No: 0811876Title: CPA-DA: Design Techniques and Tools to Enable and Enhance Coarse-Grain Power Gating in ASIC DesignsInstitution: University of Southern CaliforniaThis project focuses on coarse-grain power gating in ASIC designs, which switches entire blocks/rows of standard cells. This choice is due to lower cost and greater leakage savings of coarse-grain power gating compared to its fine-grain counterpart, which inserts the header or footer in each standard cell in the ASIC design library. The project results are expected to include the following: (i) Distributed sleep transistor placement and sizing; (ii) Sleep signal scheduling to minimize the peak current demand on wakeup; (iii) Mode transition energy minimization to enable more frequent mode transitions; (iv) Local sleep signal generation for autonomous power gating; and (v) Power gating to enable multiple power modes. This proposal aims to address each of these tasks by developing algorithmic or mathematical programming solutions to solving each step and by developing a design flow and prototype software tools that enable widespread adoption of this very interesting and important technology in the ASIC design. The semiconductor industry?s $261 B in 2006 revenue does not accurately reflect its crucial role in enabling a $47 T ($61 T on a PPP basis) world economy to thrive and grow. This industry underpins the systems and technologies on which the people and governments of the world rely on for future prosperity. This industry is currently facing some extraordinary challenges, including variability of nano devices as well as excessive power dissipation in circuits and systems. In order for the industry to continue to expand and prosper, it is critical to address these challenges heads on. The proposed research takes on one of these two fundamental challenges, i.e., the ?power crisis?. The decisive impact of the proposed research will be the enablement of the CMOS scaling to continue unabated for the next 10-15 years. Moreover, the project will actively engage students both at graduate and undergraduate levels. For graduate students, active participation in the research work will enhance their creative and multidisciplinary thinking and prepare them for future independent work. The PI?s commitment of involving undergraduate students in carefully designed projects will help foster their long lasting enthusiasm in scientific research activities. Integration of research into curriculum development and classroom teaching will provide a powerful venue for the dissemination of research results that greatly compliments the traditional venues of conferences and archival journals.
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