Research and development of III-V quantum wire transistor-based logic and memory circuits operating near the quantum limit

本研究的目的是利用III-V型化合物半导体量子线晶体管，研究和开发接近量子极限的超小延迟功率产品的新型逻辑和存储电路。取得的主要成果如下：(1)提出并制作了一种新型的单电子存储器件，该器件具有用于充电的金属纳米点和用于点电荷检测的肖特基平面内门（IPG）量子线晶体管（QWRTr），并确定了其基本工作原理。(2)作为单电子集成电路，设计、制作并表征了利用肖特基封装门（WPG） GaAs单电子晶体管（SETs）的单电子逆变电路，包括QWRTr路型逆变器和互补逆变器。在QWRTr路型逆变器中获得了大于1的传递增益。(3)一种接近量子极限的超低延迟功率积量子逻辑电路的新方法。提出了一种基于量子线晶体管的二进制多精度图（BDD）逻辑结构。采用砷化镓蚀刻纳米线和纳米肖特基材料制备了BDD节点器件，并确定了器件的基本工作原理。通过集成BDD器件构建的基本逻辑电路运行正常。(4)采用选择性MBE生长方法生长出高度均匀且尺寸可控的InGaAs和GaAs嵌入脊状量子线阵列，作为量子线晶体管的基本起始结构。通过原子氢处理和预生长工艺优化，实现了亚微米间距高密度InGaAs量子线阵列。(5)对于III-V型QWRTrs表面钝化成功，采用扫描隧道光谱（STS）对其表面进行了表征。澄清了异常STS光谱的机理。通过分析发现，在空间和能量上连续分布的表面态导致表面费米能级钉住。通过非接触式C-V、PL和STS对超薄硅界面控制层表面钝化方法进行了优化和验证。少

The purpose of this research was to study and develop novel logic and memory circuits that operate ultra-small delay-power product near the quantum limit by utilizing III-V compound semiconductor quantum wire transistors. The main results obtained are listed below :(1) A novel single electron memory device having a metal nano-dot for charging and a Schottky in-plane gate (IPG) quantum wire transistor (QWRTr) for dot-charge detection was proposed, fabricated and its basic operation was confirmed.(2) As single electron integrated circuits, single electron inverter circuits utilizing Schottky wrap gate (WPG) GaAs single electron transistor (SETs), including QWRTr road type inverters and complementary inverters, were designed, fabricated and characterized. Transfer gain larger than unity was obtained in the QWRTr road type inverter.(3) A novel approach for quantum logic circuits operating with ultra-low delay-power product near the quantum limit. It is based on implementation of a binary d … More ecision diagram (BDD) logic architecture by quantum wire transistors, was proposed. BDD node devices were fabricated using GaAs etched nanowire and nano-Schottkys and their basic operations were confirmed. Fundamental logic circuits constructed by integrating the BDD devices operated correctly.(4) Highly uniform and size-controllable InGaAs and GaAs embedded ridge quantum wire arrays were grown by selective MBE growth as basic starting structures for quantum wire transistors. Submicron-pitch high-density InGaAs quantum wire arrays were realized by an atomic hydrogen treatment and optimization of pre-growth process.(5) For successful surface passivation of III-V QWRTrs, their surfaces were characterized by scanning tunneling spectroscopy (STS). The mechanism of anomalous STS spectra was clarified. From this analysis, it was found that surface states with continuously distribution in space and energy cause surface Fermi level pinning. Surface passivation method using ultrathin Si interface control layer was optimized and verified by contactless C-V, PL and STS. Less