SHF:Small: Machine Learning Approach for Fast Electromigration Analysis and Full-Chip Assessment

电迁移(EM)已经成为纳米VLSI设计中最关键的设计问题和限制因素之一，因为随着工艺规模缩小到5 nm以下，互连线的尺寸和功率密度都在不断缩小。由于电磁建模和评估技术的重要性，近年来在建模和评估技术方面取得了许多进展。然而，快速和全芯片级的电磁分析和验证仍然是一个具有挑战性的问题，因为完整的电磁故障过程建模需要求解大型互连中流体静应力的偏微分方程组。对于全芯片级的EM签收分析来说，这将变得更加困难。与此同时，机器学习，特别是基于深度神经网络(DNN)的深度学习，如卷积神经网络(CNN)、生成对抗网络(GAN)和自动编码器等，由于在许多认知任务中取得了革命性的成功而受到越来越多的关注。然而，如何应用深度学习技术来学习和编码物理定律，并帮助求解非线性偏微分方程组，仍处于起步阶段。新的EM优化技术将增强集成电路(IC)设计行业在晶体管不断扩展和功率密度不断提高的情况下提高VLSI长期可靠性的能力。这项研究还将对机器学习、基于数据驱动的非线性动态系统建模和先进的数值方法的核心知识和技术做出重要贡献。这一奖项将使研究人员能够聘用更多女性和未被充分代表的少数族裔学生，以进一步促进美国科学技术劳动力的多样性。该项目将探索基于数据驱动的深度学习和先进的数值方法的新颖和变革性的EM建模和全芯片EM诱导的终身评估技术。首先，研究和设计基于深度学习的多段互连树瞬时静水应力分析新技术。该项目将探索DNN网络结构，如CNN、GaN、自动编码器和物理信息神经网络，用于电路和全芯片级别的EM故障过程的空洞成核和空化后阶段。其次，该项目将为考虑焦耳加热和热迁移效应的一般多段互连的基于应力的偏微分方程组开发快速解析和半解析解。在全芯片层面，将研究用于片上电源接地网络快速EM签收检查的耦合多物理分析。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

Electromigration (EM) has become one of the most critical design issues and limiting factors for nanometer VLSI designs because of the shrinking size and increasing power density of the interconnects as technology scales down to sub 5nm. Due to its importance, many advances have been made recently in EM modeling and assessment techniques. However, fast and full-chip level EM analysis and validation still remain a challenging problem as completely modeling the EM failure process requires solving partial differential equations of hydrostatic stress in large interconnects. This will become even more difficult for full-chip level EM sign-off analysis. At the same time, machine learning, especially deep learning based on deep neural networks (DNN) such as convolutional neural networks (CNN), generative adversarial networks (GAN) and auto-encoders, is gaining much attention due to transformative successes in the many cognitive tasks. How to apply deep-learning techniques to learn and encode laws of physics and help to solve nonlinear partial differential equations, however, still remains in its infancy. The new EM optimization techniques will enhance the integrated-circuit (IC) design industry’s ability to improve VLSI long-term reliability amid continued aggressive transistor scaling and increasing power density. This research will also contribute significantly to the core knowledge and technologies of machine learning and data-driven based nonlinear dynamic-system modeling and advanced numerical approaches. This award will enable the investigator to hire more female and underrepresented minority students to further contribute to the diversity in America’s science and technology workforce.This project will explore novel and transformative EM modeling and full-chip EM-induced lifetime assessment techniques based on data-driven deep learning and advanced numerical methods. First, the research will investigate and design new deep-learning-based techniques for transient hydrostatic stress analysis for multi-segment interconnect trees. The project will explore DNN network structures such as CNN, GAN, autoencoders, and physics-informed neural networks for both void nucleation and post-voiding phases of EM failure processes in both circuit and full-chip levels. Second, the project will develop fast analytic and semi-analytic solutions for the stress-based partial differential equations for general multi-segment interconnects considering Joule-heating and thermal-migration effects. At the full-chip level, a coupled multi-physics analysis for fast EM sign-off check of on-chip power ground networks will be investigated.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.