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Optimal VLSI Design for a Highly-Safe Intelligent Vehicle Based on a System Integration Theory

Optimal VLSI Design for a Highly-Safe Intelligent Vehicle Based on a System Integration Theory
基于系统集成理论的高安全智能汽车超大规模集成电路优化设计
批准号:
17300009
负责人:
KAMEYAMA Michitaka
金额:
$8.58万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B)
财政年份:
2005
资助国家:
日本
项目状态:
已结题
起止时间:
2005 至 2007

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项目成果

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中文摘要
翻译
研究了智能算法、先进的VLSI体系结构和系统集成理论,以开发高度安全的智能汽车。(1)系统-应用层设计理论真实世界的智能集成系统由环境识别、预测或估计和行为规划三个基本模块组成。研究了系统集成理论,包括性能指标的推导,以弥合各个设计层次之间的差距以及面向VLSI的智能算法。(2)高安全智能车辆处理模块开发了面向VLSI的利用三维图像信息进行道路提取、车辆提取和人体提取的算法。此外,车辆的运动估计是基于贝叶斯网络的,这个问题等价于对驾驶员意图的估计。驾驶员的意图是分层定义的,因此设计的贝叶斯网络变得尽可能简单。智能集成系统中VLSI处理器的优化设计理论为了在时间/面积约束下实现功耗最小化,研究了基于调度和分配的高层综合技术。可重构VLSI计算基于控制数据流图直接分配、位串联算术运算、动态功耗控制和使用非易失性器件的逻辑内存结构等新体系结构,设计并实现了优于传统现场可编程门阵列的细粒度可重构VLSI。
英文摘要
Intelligent algorithms, advanced VLSI architectures and a system integration theory are studied to develop a highly-safe intelligent vehicle.(1) System-Application-Level Design TheoryA real-world intelligent integrated system consists of three basic modules of environment recognition, prediction or estimation, and behavior planning. A system integration theory including derivation of performance specification is studied to bridge the gap between the various design levels as well as their VLSI-oriented intelligent algorithms.(2) Processing Module for Highly-Safe Intelligent VehiclesVLSI-oriented algorithms for road extraction, vehicle extraction and human extraction using 3-dimensional image information are developed. Moreover, motion estimation of a vehicle is done based on Bayesian Network The problem is equivalent to estimation of a driver's intention. The driver's intentions are hierarchically defined, so that the designed Bayesian Network becomes as simple as possible. Then, causal relation between the intentions is discussed to reflect the real-world motion process.(3) Optimal Design Theory of VLSI Processors for Intelligent Integrated SystemsTo achieve power minimization under a time/area constraint, high-level synthesis techniques are investigated based on scheduling and allocation. One typical example is a parallel VLSI for 3-dimensional image processing with optimal memory allocation which solves the data transfer bottleneck between processing elements and memory modules.(4) Reconfigurable VLSI ComputingFine-grained reconfigurable VLSIs for real-world applications superior to the conventional FPGAs are designed and implemented based on new architectures such as direct allocation of a control-data-flow graph, a bit-serial arithmetic operation, a dynamic control of power dissipation, and a logic-in-memory architecture utilizing nonvolatile devices.
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DOI: 10.1093/ietele/e91-c.9.1419
发表时间: 2008-09
期刊: 2007 IEEE Asian Solid-State Circuits Conference
影响因子: --
作者: [M. Hariyama;S. Ishihara;M. Kameyama]
通讯作者: M. Hariyama;S. Ishihara;M. Kameyama
DOI: --
发表时间: 2007
期刊: 電気関係学会東北支部連合大会 2E18
影响因子: --
作者: [石原翔太, 張山昌論, 亀山充隆]
通讯作者: 亀山充隆
超高速ステレオビジョンVLSIプロセッサの設計
超高速立体视觉VLSI处理器设计
DOI: --
发表时间: 2007
期刊: 第13回画像センシングシンポジウム予稿集
影响因子: --
作者: [張山昌論, 横山直人, 吉田恒, 亀山充隆]
通讯作者: 亀山充隆
GA-Based Assignment of Supply and Threshold Voltages and Interconnection Simplification for Low Power VLSI Design
基于 GA 的电源和阈值电压分配以及低功耗 VLSI 设计互连简化
DOI: --
发表时间: 2006
期刊: IEEE Asia Pacific Conference on Circuits and Systems
影响因子: --
作者: [Waidyasooriya Hasitha Muthumala, Masanori Hariyama, andMichitaka, Kameyama]
通讯作者: Kameyama
共 47 条
    Multiple-Valued Reconfigurable VLSI Based on Adaptively Autonomous Operation
    • 批准号:
      23656230
    • 项目类别:
      Grant-in-Aid for Challenging Exploratory Research
    • 资助金额:
      $2.41万
    • 财政年份:
      2011
    • 负责人:
      KAMEYAMA Michitaka
    • 依托单位:
    Development of VLSI Processor Chip Family for Highly-Safe Intelligent Vehicles Based on Optimal Design Mythologies
    • 批准号:
      12555119
    • 项目类别:
      Grant-in-Aid for Scientific Research (B)
    • 资助金额:
      $4.61万
    • 财政年份:
      2000
    • 负责人:
      KAMEYAMA Michitaka
    • 依托单位:
    Development of a Chip Family for Ultra-Highly-Parallel Multiple-Valued Integrated Circuits and Its Applications
    • 批准号:
      09558025
    • 项目类别:
      Grant-in-Aid for Scientific Research (B)
    • 资助金额:
      $5.38万
    • 财政年份:
      1997
    • 负责人:
      KAMEYAMA Michitaka
    • 依托单位:
    High-Level Synthesis of High-Performance VLSI Processors for Intelligent Integrated System
    • 批准号:
      09450162
    • 项目类别:
      Grant-in-Aid for Scientific Research (B)
    • 资助金额:
      $4.35万
    • 财政年份:
      1997
    • 负责人:
      KAMEYAMA Michitaka
    • 依托单位:
    海外基金